ADMS

{{for|the Australian research centre ADM+S|ARC Centre of Excellence for Automated Decision-Making and Society}}

{{update|date=June 2024}}

{{Use dmy dates|date=April 2023}}

Automatic Device Model Synthesizer (ADMS) is public domain software used in the semiconductor industry to translate Verilog-A models into C-models which can be directly read by a number of SPICE simulators, including Spectre Circuit Simulator, Ngspice, and HSpice.

Overview

ADMS stands for Automatic Device Model Synthesizer.{{cite web |url=http://www.mos-ak.org/boeblingen/slides/P3_Sukharev_MOS-AK_Boeblingen.pdf|title=New enhancements in ADMS and Spectre CMI XML scripts|website=mos-ak.org|access-date=9 April 2023|date=24 March 2006|author=Sergey Sukharev}} ADMS can be used to turn Verilog-A compact modelsTransistor model#Models for circuit design .28compact models.29 into C code. ADMS interpreter parses a Verilog-AMS file to build a data tree.{{cite web|url=http://vacomp.noovela.com/tutorials.html |title=Tutorial |accessdate=2014-01-09 |url-status=dead |archiveurl=https://web.archive.org/web/20130928004517/http://vacomp.noovela.com/tutorials.html |archivedate=2013-09-28 }} XML filters are applied on the tree to generate the output files.

ADMS aims to reduce the effort of circuit simulator developers to integrate device models - at the same time, it provides the option to compact model developers to use the vendor-neutral language Verilog-A for model definition, improving robustness and maintainability.{{cite web|url=http://www.ite.waw.pl/etij/pdf/35-03p.pdf |title=Compact device modeling using Verilog-AMS and ADMS |accessdate=2015-04-27 |url-status=dead |archiveurl=https://web.archive.org/web/20160304060335/http://www.ite.waw.pl/etij/pdf/35-03p.pdf |archivedate=2016-03-04 }}

ADMS is used by the open source SPICE simulator NGSPICE{{Cite web|url=http://ngspice.sourceforge.net/adms.html|title = Ngspice circuit simulator - adms}} to support a number of compact models. Following models are supported by NGSPICE using ADMS:{{Cite web|url=https://ngspice.sourceforge.io/admshowto.html|title=Ngspice circuit simulator - adms and ngspice HOWTO|website=ngspice.sourceforge.io|accessdate=9 April 2023}}

  • MOS EKV (LEVEL=44)
  • MOS PSP102 (LEVEL=45)
  • BJT Mextram 504 (LEVEL=6)
  • BJT Hicum0 (LEVEL=7)
  • BJT Hicum2 (LEVEL=8)

Limitations

{{no sources|section|date=June 2024}}

ADMS only parses a subset of Verilog-A, and not all statements are supported by all XML filters. Specifically, current controlled voltage sources are not supported in most filters targeting SPICE simulators:

  • V(..) <+ I(..) // doesn't work with NGSPICE

Instead, this needs to be represented as a conductance expression (and not impedance).

i.e. I(..) <+ V(..)

  • I (..) probes don't work with NGSPICE

Some other language constructions need to be supported in the filter as well

  • for loop,
  • case statement.

Many language features are hard to support with ADMS filters

  • laplace_transform,
  • idt,
  • switching branches.

Important aspects of code generation are close to impossible with ADMS

  • dataflow analysis
  • code optimisation,

and

  • ADMS is extremely slow (which can be seen on slightly larger models).

See also

References

{{reflist}}