CUDA

{{More information|Graphics processing unit}}

The graphics processing unit (GPU), as a specialized computer processor, addresses the demands of real-time high-resolution 3D graphics compute-intensive tasks. By 2012, GPUs had evolved into highly parallel multi-core systems allowing efficient manipulation of large blocks of data. This design is more effective than general-purpose central processing unit (CPUs) for algorithms in situations where processing large blocks of data is done in parallel, such as:

• cryptographic hash functions
• machine learning
• molecular dynamics simulations
• physics engines

Ian Buck, while at Stanford in 2000, created an 8K gaming rig using 32 GeForce cards, then obtained a DARPA grant to perform general purpose parallel programming on GPUs. He then joined Nvidia, where since 2004 he has been overseeing CUDA development. In pushing for CUDA, Jensen Huang aimed for the Nvidia GPUs to become a general hardware for scientific computing. CUDA was released in 2007. Around 2015, the focus of CUDA changed to neural networks.{{Cite magazine |last=Witt |first=Stephen |date=2023-11-27 |title=How Jensen Huang's Nvidia Is Powering the A.I. Revolution |language=en-US |magazine=The New Yorker |url=https://www.newyorker.com/magazine/2023/12/04/how-jensen-huangs-nvidia-is-powering-the-ai-revolution |access-date=2023-12-10 |issn=0028-792X}}

The following table offers a non-exact description for the ontology of CUDA framework.

File:CUDA processing flow (En).PNG |3=GPU's CUDA cores execute the kernel in parallel |4=Copy the resulting data from GPU memory to main memory}}]]

The CUDA platform is accessible to software developers through CUDA-accelerated libraries, compiler directives such as OpenACC, and extensions to industry-standard programming languages including C, C++, Fortran and Python. C/C++ programmers can use 'CUDA C/C++', compiled to PTX with nvcc, Nvidia's LLVM-based C/C++ compiler, or by clang itself.{{cite web|url=https://developer.nvidia.com/cuda-llvm-compiler|title=CUDA LLVM Compiler|date=7 May 2012}} Fortran programmers can use 'CUDA Fortran', compiled with the PGI CUDA Fortran compiler from The Portland Group.{{Update inline|reason=PGI Compilers & Tools have evolved into the NVIDIA HPC SDK. The current Fortran compiler is called nvfortran.|date=December 2022}} Python programmers can use the cuNumeric library to accelerate applications on Nvidia GPUs.

In addition to libraries, compiler directives, CUDA C/C++ and CUDA Fortran, the CUDA platform supports other computational interfaces, including the Khronos Group's OpenCL,{{YouTube|r1sN1ELJfNo|First OpenCL demo on a GPU}} Microsoft's DirectCompute, OpenGL Compute Shader and C++ AMP.{{YouTube|K1I4kts5mqc|DirectCompute Ocean Demo Running on Nvidia CUDA-enabled GPU}} Third party wrappers are also available for Python, Perl, Fortran, Java, Ruby, Lua, Common Lisp, Haskell, R, MATLAB, IDL, Julia, and native support in Mathematica.

In the computer game industry, GPUs are used for graphics rendering, and for game physics calculations (physical effects such as debris, smoke, fire, fluids); examples include PhysX and Bullet. CUDA has also been used to accelerate non-graphical applications in computational biology, cryptography and other fields by an order of magnitude or more.{{cite book|last1=Vasiliadis |first1=Giorgos |last2=Antonatos |first2=Spiros |last3=Polychronakis |first3=Michalis |last4=Markatos |first4=Evangelos P. |last5=Ioannidis |first5=Sotiris |title=Recent Advances in Intrusion Detection |chapter=Gnort: High Performance Network Intrusion Detection Using Graphics Processors |series=Lecture Notes in Computer Science |date=September 2008 |volume=5230 |pages=116–134 |doi=10.1007/978-3-540-87403-4_7 |isbn=978-3-540-87402-7 |chapter-url= http://www.ics.forth.gr/dcs/Activities/papers/gnort.raid08.pdf }}{{cite journal |last1=Schatz |first1=Michael C. |last2=Trapnell |first2=Cole |last3=Delcher |first3=Arthur L. |last4=Varshney |first4=Amitabh |year= 2007 |title= High-throughput sequence alignment using Graphics Processing Units |journal= BMC Bioinformatics |volume= 8|doi= 10.1186/1471-2105-8-474 |pages= 474 |pmid= 18070356 |pmc= 2222658 |doi-access=free }}{{cite journal|last1= Manavski |first1= Svetlin A. |last2=Giorgio |first2=Valle |title= CUDA compatible GPU cards as efficient hardware accelerators for Smith-Waterman sequence alignment |journal= BMC Bioinformatics |volume= 10 |year= 2008 |issue= Suppl 2 |doi= 10.1186/1471-2105-9-S2-S10 |pages= S10 |pmid= 18387198 |pmc= 2323659 |doi-access= free }}{{cite web|url=https://code.google.com/p/pyrit/|title=Pyrit – Google Code}}{{cite web|url=http://boinc.berkeley.edu/cuda.php|title=Use your Nvidia GPU for scientific computing|archive-url=https://web.archive.org/web/20081228022142/http://boinc.berkeley.edu/cuda.php|archive-date=2008-12-28|url-status=dead|access-date=2017-08-08|publisher=BOINC|date=2008-12-18}}

CUDA provides both a low level API (CUDA Driver API, non single-source) and a higher level API (CUDA Runtime API, single-source). The initial CUDA SDK was made public on 15 February 2007, for Microsoft Windows and Linux. Mac OS X support was later added in version 2.0,{{cite web|url=http://developer.download.nvidia.com/compute/cuda/sdk/website/doc/CUDA_SDK_release_notes_macosx.txt|title=Nvidia CUDA Software Development Kit (CUDA SDK) – Release Notes Version 2.0 for MAC OS X|url-status=dead|archive-url=https://web.archive.org/web/20090106020401/http://developer.download.nvidia.com/compute/cuda/sdk/website/doc/CUDA_SDK_release_notes_macosx.txt|archive-date=2009-01-06}} which supersedes the beta released February 14, 2008.{{cite web|url=http://news.developer.nvidia.com/2008/02/cuda-11---now-o.html|title=CUDA 1.1 – Now on Mac OS X|date=February 14, 2008|url-status=dead|archive-url=https://web.archive.org/web/20081122105633/http://news.developer.nvidia.com/2008/02/cuda-11---now-o.html|archive-date=November 22, 2008}} CUDA works with all Nvidia GPUs from the G8x series onwards, including GeForce, Quadro and the Tesla line. CUDA is compatible with most standard operating systems.

CUDA 8.0 comes with the following libraries (for compilation & runtime, in alphabetical order):

• cuBLAS – CUDA Basic Linear Algebra Subroutines library
• CUDART – CUDA Runtime library
• cuFFT – CUDA Fast Fourier Transform library
• cuRAND – CUDA Random Number Generation library
• cuSOLVER – CUDA based collection of dense and sparse direct solvers
• cuSPARSE – CUDA Sparse Matrix library
• NPP – NVIDIA Performance Primitives library
• nvGRAPH – NVIDIA Graph Analytics library
• NVML – NVIDIA Management Library
• NVRTC – NVIDIA Runtime Compilation library for CUDA C++

CUDA 8.0 comes with these other software components:

• nView – NVIDIA nView Desktop Management Software
• NVWMI – NVIDIA Enterprise Management Toolkit
• GameWorks PhysX – is a multi-platform game physics engine

CUDA 9.0–9.2 comes with these other components:

• CUTLASS 1.0 – custom linear algebra algorithms,
• NVIDIA Video Decoder was deprecated in CUDA 9.2; it is now available in NVIDIA Video Codec SDK

CUDA 10 comes with these other components:

• nvJPEG – Hybrid (CPU and GPU) JPEG processing

CUDA 11.0–11.8 comes with these other components:{{Cite web|url=https://developer.nvidia.com/blog/cuda-11-features-revealed/|title=CUDA 11 Features Revealed|date=14 May 2020}}{{Cite web|url=https://developer.nvidia.com/blog/cuda-11-1-introduces-support-rtx-30-series/|title = CUDA Toolkit 11.1 Introduces Support for GeForce RTX 30 Series and Quadro RTX Series GPUs|date = 23 September 2020}}{{Cite web|url=https://developer.nvidia.com/blog/enhancing-memory-allocation-with-new-cuda-11-2-features/|title=Enhancing Memory Allocation with New NVIDIA CUDA 11.2 Features|date=16 December 2020}}{{Cite web|url=https://developer.nvidia.com/blog/exploring-the-new-features-of-cuda-11-3/|title = Exploring the New Features of CUDA 11.3|date = 16 April 2021}}

• CUB is new one of more supported C++ libraries
• MIG multi instance GPU support
• nvJPEG2000 – JPEG 2000 encoder and decoder

CUDA has several advantages over traditional general-purpose computation on GPUs (GPGPU) using graphics APIs:

• Scattered reads{{snd}}code can read from arbitrary addresses in memory.
• Unified virtual memory (CUDA 4.0 and above)
• Unified memory (CUDA 6.0 and above)
• Shared memory{{snd}}CUDA exposes a fast shared memory region that can be shared among threads. This can be used as a user-managed cache, enabling higher bandwidth than is possible using texture lookups.{{cite conference|doi=10.1145/1375527.1375572|chapter=Efficient computation of sum-products on GPUs through software-managed cache|conference=Proceedings of the 22nd annual international conference on Supercomputing – ICS '08|year=2008|last1=Silberstein|first1=Mark|last2=Schuster|first2=Assaf|author2-link= Assaf Schuster

|last3=Geiger|first3=Dan|last4=Patney|first4=Anjul|last5=Owens|first5=John D.|title=Proceedings of the 22nd annual international conference on Supercomputing – ICS '08|isbn=978-1-60558-158-3|pages=309–318|chapter-url=https://escholarship.org/content/qt8js4v3f7/qt8js4v3f7.pdf?t=ptt3te|url=https://escholarship.org/content/qt8js4v3f7/qt8js4v3f7.pdf?t=ptt3te}}

• Faster downloads and readbacks to and from the GPU
• Full support for integer and bitwise operations, including integer texture lookups

• Whether for the host computer or the GPU device, all CUDA source code is now processed according to C++ syntax rules.{{cite web|url=http://docs.nvidia.com/cuda/pdf/CUDA_C_Programming_Guide.pdf|website=nVidia Developer Zone |title=CUDA C Programming Guide v8.0|access-date=22 March 2017|page=19|date=January 2017}} This was not always the case. Earlier versions of CUDA were based on C syntax rules.{{cite web|url=https://devtalk.nvidia.com/default/topic/508479/cuda-programming-and-performance/nvcc-forces-c-compilation-of-cu-files/#entry1340190|title=NVCC forces c++ compilation of .cu files|date=29 November 2011}} As with the more general case of compiling C code with a C++ compiler, it is therefore possible that old C-style CUDA source code will either fail to compile or will not behave as originally intended.
• Interoperability with rendering languages such as OpenGL is one-way, with OpenGL having access to registered CUDA memory but CUDA not having access to OpenGL memory.
• Copying between host and device memory may incur a performance hit due to system bus bandwidth and latency (this can be partly alleviated with asynchronous memory transfers, handled by the GPU's DMA engine).
• Threads should be running in groups of at least 32 for best performance, with total number of threads numbering in the thousands. Branches in the program code do not affect performance significantly, provided that each of 32 threads takes the same execution path; the SIMD execution model becomes a significant limitation for any inherently divergent task (e.g. traversing a space partitioning data structure during ray tracing).
• No emulation or fallback functionality is available for modern revisions.
• Valid C++ may sometimes be flagged and prevent compilation due to the way the compiler approaches optimization for target GPU device limitations.{{citation needed|date=May 2016}}
• C++ run-time type information (RTTI) and C++-style exception handling are only supported in host code, not in device code.
• In single-precision on first generation CUDA compute capability 1.x devices, denormal numbers are unsupported and are instead flushed to zero, and the precision of both the division and square root operations are slightly lower than IEEE 754-compliant single precision math. Devices that support compute capability 2.0 and above support denormal numbers, and the division and square root operations are IEEE 754 compliant by default. However, users can obtain the prior faster gaming-grade math of compute capability 1.x devices if desired by setting compiler flags to disable accurate divisions and accurate square roots, and enable flushing denormal numbers to zero.{{Cite web|url=https://developer.nvidia.com/sites/default/files/akamai/cuda/files/NVIDIA-CUDA-Floating-Point.pdf |first1=Nathan |last1=Whitehead |first2=Alex |last2=Fit-Florea |title=Precision & Performance: Floating Point and IEEE 754 Compliance for Nvidia GPUs |access-date=November 18, 2014 |publisher=Nvidia}}
• Unlike OpenCL, CUDA-enabled GPUs are only available from Nvidia as it is proprietary.{{cite web |url=https://www.nvidia.com/object/cuda_learn_products.html |title=CUDA-Enabled Products |work=CUDA Zone |publisher=Nvidia Corporation |access-date=2008-11-03}} Attempts to implement CUDA on other GPUs include:
• Project Coriander: Converts CUDA C++11 source to OpenCL 1.2 C. A fork of CUDA-on-CL intended to run TensorFlow.{{cite web|url=http://www.phoronix.com/scan.php?page=news_item&px=CUDA-On-CL-Coriander|title=Coriander Project: Compile CUDA Codes To OpenCL, Run Everywhere|publisher=Phoronix}}{{cite web|url=http://www.iwocl.org/wp-content/uploads/iwocl2017-hugh-perkins-cuda-cl.pdf|title=cuda-on-cl|last=Perkins|first=Hugh|publisher=IWOCL|date=2017|access-date=August 8, 2017}}{{cite web|url=https://github.com/hughperkins/coriander|title=hughperkins/coriander: Build NVIDIA® CUDA™ code for OpenCL™ 1.2 devices|publisher=GitHub|date=May 6, 2019}}
• CU2CL: Convert CUDA 3.2 C++ to OpenCL C.{{cite web |title=CU2CL Documentation |url=http://chrec.cs.vt.edu/cu2cl/documentation.php |website=chrec.cs.vt.edu}}
• GPUOpen HIP: A thin abstraction layer on top of CUDA and ROCm intended for AMD and Nvidia GPUs. Has a conversion tool for importing CUDA C++ source. Supports CUDA 4.0 plus C++11 and float16.
• ZLUDA is a drop-in replacement for CUDA on AMD GPUs and formerly Intel GPUs with near-native performance.{{cite web | title= GitHub – vosen/ZLUDA|website=GitHub |url=https://github.com/vosen/ZLUDA }} The developer, Andrzej Janik, was separately contracted by both Intel and AMD to develop the software in 2021 and 2022, respectively. However, neither company decided to release it officially due to the lack of a business use case. AMD's contract included a clause that allowed Janik to release his code for AMD independently, allowing him to release the new version that only supports AMD GPUs.{{Citation |last=Larabel |first=Michael |title=AMD Quietly Funded A Drop-In CUDA Implementation Built On ROCm: It's Now Open-Source |date=2024-02-12 |work=Phoronix |url=https://www.phoronix.com/review/radeon-cuda-zluda |access-date=2024-02-12 |language=en}}
• chipStar can compile and run CUDA/HIP programs on advanced OpenCL 3.0 or Level Zero platforms.{{cite web | title= GitHub – chip-spv/chipStar|website=GitHub |url=https://github.com/chip-spv/chipStar }}

This example code in C++ loads a texture from an image into an array on the GPU:

texture tex;

void foo()

{

cudaArray* cu_array;

// Allocate array

cudaChannelFormatDesc description = cudaCreateChannelDesc();

cudaMallocArray(&cu_array, &description, width, height);

// Copy image data to array

cudaMemcpyToArray(cu_array, image, width*height*sizeof(float), cudaMemcpyHostToDevice);

// Set texture parameters (default)

tex.addressMode[0] = cudaAddressModeClamp;

tex.addressMode[1] = cudaAddressModeClamp;

tex.filterMode = cudaFilterModePoint;

tex.normalized = false; // do not normalize coordinates

// Bind the array to the texture

cudaBindTextureToArray(tex, cu_array);

// Run kernel

dim3 blockDim(16, 16, 1);

dim3 gridDim((width + blockDim.x - 1)/ blockDim.x, (height + blockDim.y - 1) / blockDim.y, 1);

kernel<<< gridDim, blockDim, 0 >>>(d_data, height, width);

// Unbind the array from the texture

cudaUnbindTexture(tex);

} //end foo()

__global__ void kernel(float* odata, int height, int width)

{

unsigned int x = blockIdx.x*blockDim.x + threadIdx.x;

unsigned int y = blockIdx.y*blockDim.y + threadIdx.y;

if (x < width && y < height) {

float c = tex2D(tex, x, y);

odata[y*width+x] = c;

}

}

Below is an example given in Python that computes the product of two arrays on the GPU. The unofficial Python language bindings can be obtained from PyCUDA.{{cite web|url=http://mathema.tician.de/software/pycuda|title=PyCUDA}}

import pycuda.compiler as comp

import pycuda.driver as drv

import numpy

import pycuda.autoinit

mod = comp.SourceModule(

"""

__global__ void multiply_them(float *dest, float *a, float *b)

{

const int i = threadIdx.x;

dest[i] = a[i] * b[i];

}

"""

)

multiply_them = mod.get_function("multiply_them")

a = numpy.random.randn(400).astype(numpy.float32)

b = numpy.random.randn(400).astype(numpy.float32)

dest = numpy.zeros_like(a)

multiply_them(drv.Out(dest), drv.In(a), drv.In(b), block=(400, 1, 1))

print(dest - a * b)

Additional Python bindings to simplify matrix multiplication operations can be found in the program pycublas.{{cite web|url=http://kered.org/blog/2009-04-13/easy-python-numpy-cuda-cublas/|title=pycublas|archive-url=https://web.archive.org/web/20090420124748/http://kered.org/blog/2009-04-13/easy-python-numpy-cuda-cublas/|archive-date=2009-04-20|url-status=dead|access-date=2017-08-08}}

import numpy

from pycublas import CUBLASMatrix

A = CUBLASMatrix(numpy.mat(1, 2, 3], [4, 5, 6, numpy.float32))

B = CUBLASMatrix(numpy.mat(2, 3], [4, 5], [6, 7, numpy.float32))

C = A * B

print(C.np_mat())

while CuPy directly replaces NumPy:{{Cite web|url=https://cupy.dev/|title=CuPy|language=en|access-date=2020-01-08}}

import cupy

a = cupy.random.randn(400)

b = cupy.random.randn(400)

dest = cupy.zeros_like(a)

print(dest - a * b)

Supported CUDA compute capability versions for CUDA SDK version and microarchitecture (by code name):

{{sticky header}}

|-

| 6.0 || {{yes|1.0}} || {{yes|}} || {{yes|3.2}} || {{yes|3.5}} || || || || || || || ||

|-

| 6.5 || {{yes|1.1}} || {{yes|}} || {{yes|}} || {{yes|3.7}} || {{yes|5.x}} || || || || || || ||

|-

| 7.0 – 7.5 || || {{yes|2.0}} || {{yes|}} || {{yes|}} || {{yes|5.x}} || || || || || || ||

|-

| 8.0 || || {{yes|2.0}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|6.x}} || || || || || ||

|-

| 9.0 – 9.2 || || || {{yes|3.0}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|7.0 – 7.2}} || || || || ||

|-

| 10.0 – 10.2 || || || {{yes|3.0}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|7.5}} || || || ||

|-

| 11.0{{cite web|url=https://docs.nvidia.com/cuda/archive/11.0/cuda-toolkit-release-notes/index.html|title=CUDA 11.0 Release Notes|website=NVIDIA Developer}} || || || || {{yes|3.5}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|8.0}} || || ||

|-

| 11.1 – 11.4{{cite web|url=https://docs.nvidia.com/cuda/archive/11.1.0/cuda-toolkit-release-notes/index.html|title=CUDA 11.1 Release Notes|website=NVIDIA Developer}} || || || || {{yes|3.5}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|8.6}} || || ||

|-

| 11.5 – 11.7.1{{cite web|url=https://docs.nvidia.com/cuda/archive/11.5.0/cuda-toolkit-release-notes/index.html|title=CUDA 11.5 Release Notes|website=NVIDIA Developer}} || || || || {{yes|3.5}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|8.7}} || || ||

|-

| 11.8{{cite web|url=https://docs.nvidia.com/cuda/archive/11.8.0/cuda-toolkit-release-notes/index.html|title=CUDA 11.8 Release Notes|website=NVIDIA Developer}} || || || || {{yes|3.5}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|8.9}} || {{yes|9.0}} ||

|-

| 12.0 – 12.6 || || || || || {{yes|5.0}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|9.0}} ||

|-

| 12.8 || || || || || {{yes|5.0}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|12.0}}

|-

| 12.9 || || || || || {{yes|5.0}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|}} || {{yes|12.1}}

|}

Note: CUDA SDK 10.2 is the last official release for macOS, as support will not be available for macOS in newer releases.

CUDA compute capability by version with associated GPU semiconductors and GPU card models (separated by their various application areas):

{{sticky header}}

* – OEM-only products

Note: Any missing lines or empty entries do reflect some lack of information on that exact item.{{cite web | url=https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#features-and-technical-specifications | title=CUDA C++ Programming Guide }}

Note: Any missing lines or empty entries do reflect some lack of information on that exact item.{{cite web|url=https://www.nvidia.com/content/dam/en-zz/Solutions/gtcf21/jetson-orin/nvidia-jetson-agx-orin-technical-brief.pdf|title=Technical brief. NVIDIA Jetson AGX Orin Series|website=nvidia.com|access-date=5 September 2023}}{{cite web|url=https://images.nvidia.com/aem-dam/en-zz/Solutions/geforce/ampere/pdf/NVIDIA-ampere-GA102-GPU-Architecture-Whitepaper-V1.pdf|title=NVIDIA Ampere GA102 GPU Architecture|website=nvidia.com|access-date=5 September 2023}}

{{cite arXiv|title=Benchmarking and Dissecting the Nvidia Hopper GPU Architecture|eprint=2402.13499v1 |last1=Luo |first1=Weile |last2=Fan |first2=Ruibo |last3=Li |first3=Zeyu |last4=Du |first4=Dayou |last5=Wang |first5=Qiang |last6=Chu |first6=Xiaowen |date=2024 |class=cs.AR }}

{{cite web|url=https://images.nvidia.com/content/Solutions/data-center/a40/nvidia-a40-datasheet.pdf|title=Datasheet NVIDIA A40|website=nvidia.com|access-date=27 April 2024}}

{{cite web | url=https://www.nvidia.com/content/PDF/nvidia-ampere-ga-102-gpu-architecture-whitepaper-v2.1.pdf | title=NVIDIA AMPERE GA102 GPU ARCHITECTURE | date=27 April 2024 }}

{{cite web | url=https://www.nvidia.com/content/dam/en-zz/Solutions/design-visualization/support-guide/NVIDIA-L40-Datasheet-January-2023.pdf | title=Datasheet NVIDIA L40 | date=27 April 2024 }}

{{cite journal | last1=Sun | first1=Wei | last2=Li | first2=Ang | last3=Geng | first3=Tong | last4=Stuijk | first4=Sander | last5=Corporaal | first5=Henk | title=Dissecting Tensor Cores via Microbenchmarks: Latency, Throughput and Numeric Behaviors | journal=IEEE Transactions on Parallel and Distributed Systems| volume=34 | issue=1 |year=2023| doi=10.1109/tpds.2022.3217824 | pages=246–261| arxiv=2206.02874 | s2cid=249431357 }}{{cite web | url=https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-mma | title=Parallel Thread Execution ISA Version 7.7 }}{{cite arXiv | last1=Raihan | first1=Md Aamir | last2=Goli | first2=Negar | last3=Aamodt | first3=Tor | title=Modeling Deep Learning Accelerator Enabled GPUs | date=2018 | class=cs.MS | eprint=1811.08309 }}{{cite web | url=https://www.nvidia.com/en-gb/geforce/ada-lovelace-architecture | title=NVIDIA Ada Lovelace Architecture }}

For more information read the Nvidia CUDA C++ Programming Guide.{{Cite web |title=CUDA C++ Programming Guide, Compute Capabilities |url=https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#compute-capabilities |access-date=2025-02-06 |website=docs.nvidia.com |language=en-us}}

• Accelerated rendering of 3D graphics
• Accelerated interconversion of video file formats
• Accelerated encryption, decryption and compression
• Bioinformatics, e.g. NGS DNA sequencing BarraCUDA{{Cite web|url=https://www.biocentric.nl/biocentric/nvidia-cuda-bioinformatics-barracuda/|title=nVidia CUDA Bioinformatics: BarraCUDA|date=2019-07-19|website=BioCentric|language=en|access-date=2019-10-15}}
• Distributed calculations, such as predicting the native conformation of proteins
• Medical analysis simulations, for example virtual reality based on CT and MRI scan images
• Physical simulations,{{Cite web|title=Part V: Physics Simulation|url=https://developer.nvidia.com/gpugems/gpugems3/part-v-physics-simulation|access-date=2020-09-11|website=NVIDIA Developer|language=en}} particularly in fluid dynamics
• Neural network training in machine learning problems
• Large Language Model inference
• Face recognition
• Volunteer computing projects, such as SETI@home and other projects using BOINC software
• Molecular dynamics
• Mining cryptocurrencies
• Structure from motion (SfM) software

CUDA competes with other GPU computing stacks: Intel OneAPI and AMD ROCm.

Whereas Nvidia's CUDA is closed-source, Intel's OneAPI and AMD's ROCm are open source.

{{Main|OneAPI (compute acceleration)}}

oneAPI is an initiative based in open standards, created to support software development for multiple hardware architectures.{{Cite web |title=oneAPI Programming Model |url=https://www.oneapi.io/ |access-date=2024-07-27 |website=oneAPI.io |language=en-US}} The oneAPI libraries must implement open specifications that are discussed publicly by the Special Interest Groups, offering the possibility for any developer or organization to implement their own versions of oneAPI libraries.{{Cite web |title=Specifications {{!}} oneAPI |url=https://www.oneapi.io/spec/ |access-date=2024-07-27 |website=oneAPI.io |language=en-US}}{{Cite web |title=oneAPI Specification — oneAPI Specification 1.3-rev-1 documentation |url=https://oneapi-spec.uxlfoundation.org/specifications/oneapi/v1.3-rev-1/ |access-date=2024-07-27 |website=oneapi-spec.uxlfoundation.org}}

Originally made by Intel, other hardware adopters include Fujitsu and Huawei.

Unified Acceleration Foundation (UXL) is a new technology consortium working on the continuation of the OneAPI initiative, with the goal to create a new open standard accelerator software ecosystem, related open standards and specification projects through Working Groups and Special Interest Groups (SIGs). The goal is to offer open alternatives to Nvidia's CUDA. The main companies behind it are Intel, Google, ARM, Qualcomm, Samsung, Imagination, and VMware.{{Cite web |title=Exclusive: Behind the plot to break Nvidia's grip on AI by targeting software |website=Reuters |url=https://www.reuters.com/technology/behind-plot-break-nvidias-grip-ai-by-targeting-software-2024-03-25/ |access-date=2024-04-05}}

{{Main|ROCm}}

ROCm{{Cite web|url=https://github.com/RadeonOpenCompute/ROCm/issues/1628|title=Question: What does ROCm stand for? · Issue #1628 · RadeonOpenCompute/ROCm|website=Github.com|access-date=January 18, 2022}} is an open source software stack for graphics processing unit (GPU) programming from Advanced Micro Devices (AMD).

• SYCL – an open standard from Khronos Group for programming a variety of platforms, including GPUs, with single-source modern C++, similar to higher-level CUDA Runtime API (single-source)
• BrookGPU – the Stanford University graphics group's compiler
• Array programming
• Parallel computing
• Stream processing
• rCUDA – an API for computing on remote computers
• Molecular modeling on GPUs
• Vulkan – low-level, high-performance 3D graphics and computing API
• OptiX – ray tracing API by NVIDIA
• CUDA binary (cubin) – a type of fat binary
• Numerical Library Collection – by NEC for their vector processor

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• {{Cite journal |last1=Buck |first1=Ian |last2=Foley |first2=Tim |last3=Horn |first3=Daniel |last4=Sugerman |first4=Jeremy |last5=Fatahalian |first5=Kayvon |last6=Houston |first6=Mike |last7=Hanrahan |first7=Pat |date=2004-08-01 |title=Brook for GPUs: stream computing on graphics hardware |url=https://dl.acm.org/doi/10.1145/1015706.1015800 |journal=ACM Transactions on Graphics |volume=23 |issue=3 |pages=777–786 |doi=10.1145/1015706.1015800 |issn=0730-0301}}
• {{Cite journal |last1=Nickolls |first1=John |last2=Buck |first2=Ian |last3=Garland |first3=Michael |last4=Skadron |first4=Kevin |date=2008-03-01 |title=Scalable Parallel Programming with CUDA: Is CUDA the parallel programming model that application developers have been waiting for? |url=https://dl.acm.org/doi/10.1145/1365490.1365500 |journal=Queue |volume=6 |issue=2 |pages=40–53 |doi=10.1145/1365490.1365500 |issn=1542-7730}}

• {{Official website}}

{{Nvidia}}

{{CPU technologies}}

{{Parallel computing}}

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