Delta delay

{{more citations needed|date=October 2013}}

In VHDL simulations, all assignments to signals (a VHDL concept that represents a net connecting different components together) occur with some infinitesimal delay, known as delta delay, unless a delay is specified.{{cite book|last=Bhasker|first=Jayaram|title=A Vhdl Primer|year=1999|publisher=Prentice Hall PTR, 1999|isbn=9780130965752|pages=31, 46}} Technically, delta delay is of no measurable unit, but from a digital electronics hardware design perspective one should think of delta delay as being the smallest time unit one could measure, such as a femtosecond (fs).