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Extended Display Identification Data

{{Short description|Metadata formats for display devices}}

{{Multiple issues|{{more citations needed|date=May 2023}}

{{original research|date=May 2023}}}}

Extended Display Identification Data (EDID) and Enhanced EDID (E-EDID) are metadata formats for display devices to describe their capabilities to a video source (e.g., graphics card or set-top box). The data format is defined by a standard published by the Video Electronics Standards Association (VESA).

The EDID data structure includes manufacturer name and serial number, product type, phosphor or filter type (as chromaticity data), timings supported by the display, display size, luminance data and (for digital displays only) pixel mapping data.

DisplayID is a VESA standard targeted to replace EDID and E-EDID extensions with a uniform format suited for both PC monitor and consumer electronics devices.

Background

{{primary sources|section|date=February 2013}}

EDID structure (base block) versions range from v1.0 to v1.4; all these define upwards-compatible 128-byte structures. Version 2.0 defined a new 256-byte structure but it has been deprecated and replaced by E-EDID which supports multiple extension blocks.{{citation needed|date=October 2011}} HDMI versions 1.0–1.3c use E-EDID v1.3.{{cite web |url=http://www.microprocessor.org/HDMISpecification13a.pdf |archive-url=https://web.archive.org/web/20160305072940/http://www.microprocessor.org/HDMISpecification13a.pdf |url-status=dead |archive-date=5 March 2016 |title=High-Definition Multimedia Interface Specification Version 1.3a |date=10 November 2006 |access-date=2017-04-01 }}

Before Display Data Channel (DDC) and EDID were defined, there was no standard way for a graphics card to know what kind of display device it was connected to. Some VGA connectors in personal computers provided a basic form of identification by connecting one, two or three pins to ground, but this coding was not standardized.

This problem is solved by EDID and DDC, as it enables the display to send information to the graphics card it is connected to. The transmission of EDID information usually uses the Display Data Channel protocol, specifically DDC2B, which is based on I²C-bus (DDC1 used a different serial format which never gained popularity). The data is transmitted via the cable connecting the display and the graphics card; VGA, DVI, DisplayPort and HDMI are supported.{{citation needed|date=October 2011}}

The EDID is often stored in the monitor in the firmware chip called serial EEPROM (electrically erasable programmable read-only memory) and is accessible via the I²C-bus at address {{code|0x50}}. The EDID PROM can often be read by the host PC even if the display itself is turned off.

Many software packages can read and display the EDID information, such as read-edid{{cite web |url=http://www.polypux.org/projects/read-edid/ |title=read-edid |website=Polypux.org |access-date=2017-04-01 |archive-date=2010-12-11 |archive-url=https://web.archive.org/web/20101211003405/http://www.polypux.org/projects/read-edid/ |url-status=live }} for Linux and DOS, PowerStrip{{cite web |url=http://www.entechtaiwan.com/util/ps.shtm |title=Utilities | PowerStrip |publisher=EnTech Taiwan |date=2012-03-25 |access-date=2017-04-01 |archive-date=2011-03-08 |archive-url=https://web.archive.org/web/20110308182859/http://entechtaiwan.com/util/ps.shtm |url-status=live }} for Microsoft Windows and the X.Org Server for Linux and BSD unix. Mac OS X natively reads EDID information and programs such as SwitchResX{{cite web |url=http://www.madrau.com/ |title=SwitchResX - The Most Versatile Tool For Controlling Screen Resolutions On Your Mac |website=Madrau.com |access-date=2017-04-01 |archive-date=2009-02-08 |archive-url=https://web.archive.org/web/20090208214058/http://madrau.com/ |url-status=live }} or DisplayConfigX{{cite web |author=Harald Schweder |url=http://www.3dexpress.de/ |title=DisplayConfigX |website=3dexpress.de |date=2003-02-11 |access-date=2017-04-01 |archive-date=2011-07-18 |archive-url=https://web.archive.org/web/20110718193430/http://www.3dexpress.de/ |url-status=live }} can display the information as well as use it to define custom resolutions.

E-EDID was introduced at the same time as E-DDC, which supports multiple extensions blocks and deprecated EDID version 2.0 structure (it can be incorporated in E-EDID as an optional extension block). Data fields for preferred timing, range limits, and monitor name are required in E-EDID. E-EDID also adds support for the Dual GTF curve concept and partially changed the encoding of aspect ratio within the standard timings.

With the use of extensions, E-EDID structure can be extended up to 32 KiB, because the E-DDC added the capability to address multiple (up to 128) 256 byte segments.

=EDID Extensions assigned by VESA=

  • Timing Extension ({{code|00}})
  • Additional Timing Data Block (CTA EDID Timing Extension) ({{code|02}})
  • Video Timing Block Extension (VTB-EXT) ({{code|10}})
  • EDID 2.0 Extension ({{code|20}})
  • Display Information Extension (DI-EXT) ({{code|40}})
  • Localized String Extension (LS-EXT) ({{code|50}})
  • Microdisplay Interface Extension (MI-EXT) ({{code|60}})
  • Display ID Extension ({{code|70}})
  • Display Transfer Characteristics Data Block (DTCDB) ({{code|A7}}, {{code|AF}}, {{code|BF}})
  • Block Map ({{code|F0}})
  • Display Device Data Block (DDDB) ({{code|FF}}): contains information such as subpixel layout{{Cite web |date=25 September 2006 |title=VESA Display Device Data Block (DDDB) Standard |url=https://glenwing.github.io/docs/VESA-EEDID-DDDB-1.pdf |url-status=live |archive-url=https://web.archive.org/web/20210417141716/https://glenwing.github.io/docs/VESA-EEDID-DDDB-1.pdf |archive-date=2021-04-17 |website=github.io}}
  • Extension defined by monitor manufacturer ({{code|FF}}): According to LS-EXT, actual contents varies from manufacturer. However, the value is later used by DDDB.

Revision history

  • August 1994, DDC standard version 1 – introduce EDID v1.0.
  • April 1996, EDID standard version 2 – introduce EDID v1.1.
  • November 1997, EDID standard version 3 – introduce EDID v1.2 and EDID v2.0.
  • September 1999, E-EDID Standard Release A – introduce EDID v1.3 and E-EDID v1.0, which supports multiple extensions blocks.
  • February 2000, E-EDID Standard Release A - introduce E-EDID v1.3 (used in HDMI), based on EDID v1.3. EDID v2.0 deprecated.
  • September 2006, E-EDID Standard Release A – introduce E-EDID v1.4, based on EDID v1.4.

Limitations

Some graphics card drivers have historically coped poorly with the EDID, using only its standard timing descriptors rather than its Detailed Timing Descriptors (DTDs). Even in cases where the DTDs were read, the drivers are/were still often limited by the standard timing descriptor limitation that the horizontal/vertical resolutions must be evenly divisible by 8. This means that many graphics cards cannot express the native resolutions of the most common widescreen flat-panel displays and liquid-crystal display TVs. The number of vertical pixels is calculated from the horizontal resolution and the selected aspect ratio. To be fully expressible, the size of widescreen display must thus be a multiple of 16×9 pixels. For 1366×768 pixel Wide XGA panels the nearest resolution expressible in the EDID standard timing descriptor syntax is 1360×765 pixels, typically leading to 3-pixel-thin black bars. Specifying 1368 pixels as the screen width would yield an unnatural screen height of 769.5 pixels.

Many Wide XGA panels do not advertise their native resolution in the standard timing descriptors, instead offering only a resolution of 1280×768. Some panels advertise a resolution only slightly smaller than the native, such as 1360×765. For these panels to be able to show a pixel perfect image, the EDID data must be ignored by the display driver or the driver must correctly interpret the DTD and be able to resolve resolutions whose size is not divisible by 8. Special programs are available to override the standard timing descriptors from EDID data. Even this is not always possible, as some vendors' graphics drivers (notably those of Intel) require specific registry hacks to implement custom resolutions, which can make it very difficult to use the screen's native resolution.{{cite web

|url=http://software.intel.com/en-us/articles/custom-resolutions-on-intel-graphics/

|title=Custom Resolutions on Intel Graphics

|author=Brezenski

|website=Software.intel.com

|date=2009-08-07

|access-date=2009-11-04

|archive-date=2011-03-15

|archive-url=https://web.archive.org/web/20110315173648/http://software.intel.com/en-us/articles/custom-resolutions-on-intel-graphics/

|url-status=live

}}

EDID 1.4 data format

=Structure, version 1.4=

class=wikitable

|+ EDID structure, version 1.4[https://glenwing.github.io/docs/VESA-EEDID-A2.pdf VESA E-EDID Standard, Release A, Revision 2. September 25, 2006] {{Webarchive|url=https://web.archive.org/web/20201111202112/https://glenwing.github.io/docs/VESA-EEDID-A2.pdf |date=November 11, 2020 }};{{Citation |url=http://read.pudn.com/downloads110/ebook/456020/E-EDID%20Standard.pdf |title=VESA Enhanced EDID Standard |date=2000-02-09 |publisher=Video Electronics Standards Association |page=32 |access-date=2011-11-19 |archive-date=2012-04-25 |archive-url=https://web.archive.org/web/20120425232847/http://read.pudn.com/downloads110/ebook/456020/E-EDID%20Standard.pdf |url-status=live }}

! Bytes

colspan=2| Description
0–19 ||colspan=2| Header information
0–7colspan=2| Fixed header pattern: 00 FF FF FF FF FF FF 00
rowspan=5| 8–9colspan=2| Manufacturer ID. This is a legacy Plug and Play ID assigned by [https://www.uefi.org/pnp_id_list UEFI forum], which is a big-endian 16-bit value made up of three 5-bit letters: 00001, A; 00010, B; ...; 11010, Z. E.g.: 24 4d, {{underline|0}} {{underline|01001}} {{underline|00010}} {{underline|01101}}, "IBM"; "PHL" (Philips).
Bit 15{{code|0}} = reserved
Bits 14–10First letter of manufacturer ID (byte 8, bits 6–2)
Bits 9–5Second letter of manufacturer ID (byte 8, bit 1 through byte 9 bit 5)
Bits 4–0Third letter of manufacturer ID (byte 9 bits 4–0)
10–11colspan=2| Manufacturer product code. 16-bit hex number, little-endian. For Example, "PHL" + "C0CF".
12–15colspan=2| Serial number. 32 bits, little-endian.
16colspan=2| Week of manufacture; or {{code|FF}} model year flag. Week numbering is not consistent between manufacturers.
17colspan=2| Year of manufacture, or year of model, if model year flag is set. Year = datavalue + 1990.
18colspan=2| EDID version, usually {{code|01}} (for 1.3 and 1.4)
19colspan=2| EDID revision, usually {{code|03}} (for 1.3) or {{code|04}} (for 1.4)
20–24 ||colspan=2| Basic display parameters
rowspan=11| 20colspan=2| Video input parameters bitmap
Bit 7 = {{code|1}}Digital input. If set, the following bit definitions apply:
Bits 6–4Bit depth:

{{code|000}} = undefined

{{code|001}} = 6

{{code|010}} = 8

{{code|011}} = 10

{{code|100}} = 12

{{code|101}} = 14

{{code|110}} = 16 bits per color

{{code|111}} = reserved

Bits 3–0Video interface:

{{code|0000}} = undefined

{{code|0001}} = DVI

{{code|0010}} = HDMIa

{{code|0011}} = HDMIb

{{code|0100}} = MDDI

{{code|0101}} = DisplayPort

Bit 7 = {{code|0}}Analog input. If clear, the following bit definitions apply:
Bits 6–5Video white and sync levels, relative to blank:

{{code|00}} = +0.7/−0.3 V

{{code|01}} = +0.714/−0.286 V

{{code|10}} = +1.0/−0.4 V

{{code|11}} = +0.7/0 V (EVC)

Bit 4Blank-to-black setup (pedestal) expected
Bit 3Separate sync supported
Bit 2Composite sync (on HSync) supported
Bit 1Sync on green supported
Bit 0VSync pulse must be serrated when composite or sync-on-green is used.
21colspan=2| Horizontal screen size, in centimetres (range 1–255). If vertical screen size is 0, landscape aspect ratio (range 1.00–3.54), datavalue = (AR×100) − 99 (example: 16:9, 79; 4:3, 34.)
22colspan=2| Vertical screen size, in centimetres. If horizontal screen size is 0, portrait aspect ratio (range 0.28–0.99), datavalue = (100/AR) − 99 (example: 9:16, 79; 3:4, 34.) If both bytes are 0, screen size and aspect ratio are undefined (e.g. projector)
23colspan=2| Display gamma, factory default (range 1.00–3.54), datavalue = (gamma×100) − 100 = (gamma − 1)×100. If 255, gamma is defined by DI-EXT block.
rowspan=9| 24colspan=2| Supported features bitmap
Bit 7DPMS standby supported
Bit 6DPMS suspend supported
Bit 5DPMS active-off supported
rowspan=2 | Bits 4–3

| Display type (digital):

{{code|00}} = RGB 4:4:4

{{code|01}} = RGB 4:4:4 + YCrCb 4:4:4

{{code|10}} = RGB 4:4:4 + YCrCb 4:2:2

{{code|11}} = RGB 4:4:4 + YCrCb 4:4:4 + YCrCb 4:2:2

Display type (analog):

{{code|00}} = monochrome or grayscale

{{code|01}} = RGB color

{{code|10}} = non-RGB color

{{code|11}} = undefined

Bit 2Standard sRGB colour space. Bytes 25–34 must contain sRGB standard values.
Bit 1Preferred timing mode specified in descriptor block 1. For EDID 1.3+ the preferred timing mode is always in the first Detailed Timing Descriptor. In that case, this bit specifies whether the preferred timing mode includes native pixel format and refresh rate.
Bit 0Continuous timings with GTF or CVT
25–34 ||colspan=2| Chromaticity coordinates.
10-bit 2° CIE 1931 xy coordinates for red, green, blue, and white point
rowspan=5| 25colspan=2| Red and green least-significant bits (2−9, 2−10)
Bits 7–6Red x value least-significant 2 bits
Bits 5–4Red y value least-significant 2 bits
Bits 3–2Green x value least-significant 2 bits
Bits 1–0Green y value least-significant 2 bits
26colspan=2| Blue and white least-significant 2 bits
27colspan=2| Red x value most significant 8 bits (2−1, ..., 2−8). 0–255 encodes fractional 0–0.996 (255/256); 0–0.999 (1023/1024) with lsbits
28colspan=2| Red y value most significant 8 bits
29–30colspan=2| Green x and y value most significant 8 bits
31–32colspan=2| Blue x and y value most significant 8 bits
33–34colspan=2| Default white point x and y value most significant 8 bits
35–37 ||colspan=2| Established timing bitmap. Supported bitmap for (formerly) very common timing modes.
rowspan=8| 35Bit 7720×400 @ 70 Hz (VGA)
Bit 6720×400 @ 88 Hz (XGA)
Bit 5640×480 @ 60 Hz (VGA)
Bit 4640×480 @ 67 Hz (Apple Macintosh II)
Bit 3640×480 @ 72 Hz
Bit 2640×480 @ 75 Hz
Bit 1800×600 @ 56 Hz
Bit 0800×600 @ 60 Hz
rowspan=8| 36Bit 7800×600 @ 72 Hz
Bit 6800×600 @ 75 Hz
Bit 5832×624 @ 75 Hz (Apple Macintosh II)
Bit 41024×768 @ 87 Hz, interlaced (1024×768i)
Bit 31024×768 @ 60 Hz
Bit 21024×768 @ 70 Hz
Bit 11024×768 @ 75 Hz
Bit 01280×1024 @ 75 Hz
rowspan=2| 37Bit 71152x870 @ 75 Hz (Apple Macintosh II)
Bits 6–0Other manufacturer-specific display modes
38–53 ||colspan=2| Standard timing information. Up to 8 2-byte fields describing standard display modes.
Unused fields are filled with 01 01 hex. The following definitions apply in each record:
38colspan=2| Standard timing 1: X resolution, {{code|00}} = reserved; otherwise, (datavalue + 31) × 8 (256–2288 pixels).
rowspan=2 | 39

| Bits 7–6

Standard timing 1: Image aspect ratio:

{{code|00}} = 16:10

{{code|01}} = 4:3

{{code|10}} = 5:4

{{code|11}} = 16:9

(Versions prior to 1.3 defined {{code|00}} as 1:1.)

Bits 5–0Vertical frequency, datavalue + 60 (60–123 Hz)
40-41Standard timing 2
42-43Standard timing 3
44-45Standard timing 4
46-47Standard timing 5
48-49Standard timing 6
50-51Standard timing 7
52-53Standard timing 8
54–125 ||colspan=2| Display timing descriptor followed by display/monitor descriptors
54–71Preferred timing descriptorrowspan=4| 18 byte detailed timing descriptors or display descriptors
72–89Descriptor 2
90–107Descriptor 3
108–125Descriptor 4
126-127 ||colspan=2| Extension flag and checksum
126colspan=2| Number of extensions to follow. 0 if no extensions.
127colspan=2| Checksum. Sum of all 128 bytes should equal 0 (mod 256).

=Detailed Timing Descriptor=

class=wikitable

|+ EDID Detailed Timing Descriptor

! Bytes

colspan=2| Description
0–1colspan=2| Pixel clock. {{code|00}} = reserved; otherwise in 10 kHz units (0.01–655.35 MHz, little-endian).
2colspan=2| Horizontal active pixels 8 lsbits (0–255)
3colspan=2| Horizontal blanking pixels 8 lsbits (0–255) End of active to start of next active.
rowspan=2| 4Bits 7–4Horizontal active pixels 4 msbits (0–15)
Bits 3–0Horizontal blanking pixels 4 msbits (0–15)
5colspan=2| Vertical active lines 8 lsbits (0–255)
6colspan=2| Vertical blanking lines 8 lsbits (0–255)
rowspan=2| 7Bits 7–4Vertical active lines 4 msbits (0–15)
Bits 3–0Vertical blanking lines 4 msbits (0–15)
8colspan=2| Horizontal front porch (sync offset) pixels 8 lsbits (0–255) From blanking start
9colspan=2| Horizontal sync pulse width pixels 8 lsbits (0–255)
rowspan=2| 10Bits 7–4Vertical front porch (sync offset) lines 4 lsbits (0–15)
Bits 3–0Vertical sync pulse width lines 4 lsbits (0–15)
rowspan=4| 11Bits 7–6Horizontal front porch (sync offset) pixels 2 msbits (0–3)
Bits 5–4Horizontal sync pulse width pixels 2 msbits (0–3)
Bits 3–2Vertical front porch (sync offset) lines 2 msbits (0–3)
Bits 1–0Vertical sync pulse width lines 2 msbits (0–3)
12colspan=2| Horizontal image size, mm, 8 lsbits (0–255 mm, 161 in)
13colspan=2| Vertical image size, mm, 8 lsbits (0–255 mm, 161 in)
rowspan=2| 14Bits 7–4Horizontal image size, mm, 4 msbits (0–15)
Bits 3–0Vertical image size, mm, 4 msbits (0–15)
15colspan=2| Horizontal border pixels (one side; total is twice this) (0–255)
16colspan=2| Vertical border lines (one side; total is twice this) (0–255)
rowspan=14| 17colspan=2| Features bitmap
Bit 7Signal Interface Type:

{{code|0}} = non-interlaced;

{{code|1}} = interlaced.

Bits 6–5Stereo mode (combine bits 6–5 with bit 0):

{{code|00}} {{code|x}} = none, bit 0 is "don't care";

{{code|01}} {{code|0}} = field sequential, right during stereo sync;

{{code|10}} {{code|0}} = field sequential, left during stereo sync;

{{code|01}} {{code|1}} = 2-way interleaved, right image on even lines;

{{code|10}} {{code|1}} = 2-way interleaved, left image on even lines;

{{code|11}} {{code|0}} = 4-way interleaved;

{{code|11}} {{code|1}} = side-by-side interleaved.

Bit 4 = {{code|0}} || Analog sync.
If set, the following bit definitions apply:
Bit 3Sync type:

{{code|0}} = analog composite;

{{code|1}} = bipolar analog composite.

Bit 2Serration:

{{code|0}} = without serrations;

{{code|1}} = with serrations (H-sync during V-sync).

Bit 1Sync on red and blue lines additionally to green

{{code|0}} = sync on green signal only;

{{code|1}} = sync on all three (RGB) video signals.

Bits 4–3 = {{code|10}} || Digital sync., composite (on HSync).
If set, the following bit definitions apply:
Bit 2Serration

{{code|0}} = without serration;

{{code|1}} = with serration (H-sync during V-sync).

Bit 1Horizontal sync polarity:

{{code|0}} = negative;

{{code|1}} = positive.

Bits 4–3 = {{code|11}} || Digital sync., separate
If set, the following bit definitions apply:
Bit 2Vertical sync polarity:

{{code|0}} = negative;

{{code|1}} = positive.

Bit 1Horizontal sync polarity:

{{code|0}} = negative;

{{code|1}} = positive.

Bit 0 || Stereo mode (combines with bits 6–5)

When used for another descriptor, the pixel clock and some other bytes are set to 0:

=Monitor Descriptors=

class=wikitable

|+ EDID Monitor Descriptors

! Bytes

Description
0–1

| {{code|0}} = Monitor Descriptor (cf. Detailed Timing Descriptor).

2{{code|0}} = reserved
3Descriptor type. FA–FF currently defined. 00–0F reserved for vendors.
4{{code|0}} = reserved, except for Display Range Limits Descriptor.
5–17Defined by descriptor type. If text, code page 437 text, terminated (if less than 13 bytes) with LF and padded with SP.

Currently defined descriptor types are:

  • {{code|FF}}: Monitor serial number (ASCII text)
  • {{code|FE}}: Unspecified text (ASCII text)
  • {{code|FD}}: Monitor range limits. 6- or 13-byte (with additional timing) binary descriptor.
  • {{code|FC}}: Monitor name (ASCII text), for example "PHL 223V5".
  • {{code|FB}}: Additional white point data. 2× 5-byte descriptors, padded with 0A 20 20.
  • {{code|FA}}: Additional standard timing identifiers. 6× 2-byte descriptors, padded with 0A.
  • {{code|F9}}: Display Color Management (DCM).
  • {{code|F8}}: CVT 3-Byte Timing Codes.
  • {{code|F7}}: Additional standard timing 3.
  • {{code|10}}: Dummy identifier.
  • {{code|00–0F}}: Manufacturer reserved descriptors.

=Display Range Limits=

==Descriptor==

class=wikitable

|+ EDID Display Range Limits Descriptor

! Bytes

colspan=2| Description
0–1colspan=2| {{code|00 00}} = Display Descriptor
2colspan=2| {{code|00}} = reserved
3colspan=2| {{code|FD}} = Display Range Limits Descriptor
rowspan=4| 4

|colspan=2| Offsets for display range limits

Bits 7–4{{code|00}} = reserved
Bits 3–2Horizontal rate offsets:

{{code|00}} = none;

{{code|10}} = +255 kHz for max. rate;

{{code|11}} = +255 kHz for max. and min. rates.

Bits 1–0Vertical rate offsets:

{{code|00}} = none;

{{code|10}} = +255 Hz for max. rate;

{{code|11}} = +255 Hz for max. and min. rates.

5Minimumrowspan=2| vertical field rate (1–255 Hz; 256–510 Hz, if offset).
6Maximum
7Minimumrowspan=2| horizontal line rate (1–255 kHz; 256–510 kHz, if offset).
8Maximum
9colspan=2| Maximum pixel clock rate, rounded up to 10 MHz multiple (10–2550 MHz).
10colspan=2| Extended timing information type:

00 = Default GTF (when basic display parameters byte 24, bit 0 is set).

01 = No timing information.

02 = Secondary GTF supported, parameters as follows.

04 = CVT (when basic display parameters byte 24, bit 0 is set), parameters as follows.

11–17colspan=2| Video timing parameters (if byte 10 is 00 or 01, padded with 0A 20 20 20 20 20 20).

==With GTF secondary curve==

class=wikitable

|+ EDID Display Range Limits with {{abbr|GTF|Generalized Timing Formula}} Secondary curve

! Bytes

Description
1002
11colspan=2| {{code|00}} = reserved
12Start frequency for secondary curve, divided by 2 kHz (0–510 kHz)
13GTF C value, multiplied by 2 (0–127.5)
14–15GTF M value (0–65535, little-endian)
16GTF K value (0–255)
17GTF J value, multiplied by 2 (0–127.5)

==With CVT support==

class=wikitable

|+ EDID Display Range Limits with CVT support

! Bytes

colspan=2| Description
10colspan=2| 04
rowspan=2| 11Bits 7–4CVT major version (1–15)
Bits 3–0CVT minor version (0–15)
rowspan=2| 12Bits 7–2Additional clock precision in 0.25 MHz increments
(to be subtracted from byte 9 maximum pixel clock rate)
Bits 1–0Maximum active pixels per line, 2-bit msb
13colspan=2| Maximum active pixels per line, 8-bit lsb (no limit if {{code|0}})
rowspan=7| 14colspan=2| Aspect ratio bitmap
Bit 7{{ratio|4|3}}
Bit 6{{ratio|16|9}}
Bit 5{{ratio|16|10}}
Bit 4{{ratio|5|4}}
Bit 3{{ratio|15|9}}
Bits 2–0{{code|000}} = reserved
rowspan=4| 15Bits 7–5Aspect ratio preference:

{{code|000}} = {{ratio|4|3}}

{{code|001}} = {{ratio|16|9}}

{{code|010}} = {{ratio|16|10}}

{{code|011}} = {{ratio|5|4}}

{{code|100}} = {{ratio|15|9}}

Bit 4CVT-RB reduced blanking (preferred)
Bit 3CVT standard blanking
Bits 2–0{{code|000}} = reserved
rowspan=6| 16colspan=2| Scaling support bitmap
Bit 7Horizontal shrink
Bit 6Horizontal stretch
Bit 5Vertical shrink
Bit 4Vertical stretch
Bits 3–0{{code|0000}} = reserved
17colspan=2| Preferred vertical refresh rate (1–255)

=Additional white point descriptor=

class=wikitable

|+ EDID additional white point descriptor

! Bytes

colspan=2| Description
0–4colspan=2| {{code|00 00 00}} {{code|FB}} {{code|00}}
5colspan=2| White point index number (1–255). Usually 1; 0 indicates descriptor not used.
rowspan=4| 6colspan=2| White point CIE xy coordinates least-significant bits (like EDID byte 26)
Bits 7–4{{code|000}} = reserved
Bits 3–2White point x value least-significant 2 bits
Bits 1–0White point y value least-significant 2 bits
7colspan=2| White point x value most significant 8 bits (like EDID byte 27)
8colspan=2| White point y value most significant 8 bits (like EDID byte 28)
9colspan=2| datavalue = (gamma − 1)×100 (1.0–3.54, like EDID byte 23)
10–14colspan=2| Second descriptor. Index number starts with 2; if {{code|0}} = unused
15–17colspan=2| Unused, padded with 0A 20 20.

=Color management data descriptor=

class=wikitable

|+ EDID color management data descriptor

! Bytes

Description
0–4{{code|00 00 00}} {{code|F9}} {{code|00}}
5Version: 03
6Red a3 lsb
7Red a3 msb
8Red a2 lsb
9Red a2 msb
10Green a3 lsb
11Green a3 msb
12Green a2 lsb
13Green a2 msb
14Blue a3 lsb
15Blue a3 msb
16Blue a2 lsb
17Blue a2 msb

=CVT 3-byte timing codes descriptor=

class=wikitable

|+ EDID CVT 3-byte timing codes descriptor

! Bytes

colspan=2| Description
0–4colspan=2| {{code|00 00 00}} {{code|F8}} {{code|00}}
5colspan=2| Version: 01
6-8 ||colspan=2| CVT timing descriptor #1
6colspan=2| Addressable lines per field 8-bit lsb
rowspan=3| 7Bits 7–4Addressable lines per field 4-bit msb
Bits 3–2Aspect ratio:

{{code|00}} = {{ratio|4|3}}

{{code|01}} = {{ratio|16|9}}

{{code|10}} = {{ratio|16|10}}

{{code|11}} = {{ratio|15|9}}

Bits 1–0{{code|00}} = reserved
rowspan=8| 8Bit 7{{code|0}} = reserved
Bits 6–5Preferred vertical rate:

{{code|00}}: 50 Hz

{{code|01}}: 60 Hz

{{code|10}}: 75 Hz

{{code|11}}: 85 Hz

colspan=2| Vertical rate bitmap
Bit 450 Hz CVT
Bit 360 Hz CVT
Bit 275 Hz CVT
Bit 185 Hz CVT
Bit 060 Hz CVT reduced blanking
9–11 ||colspan=2| CVT timing descriptor #2
12–14 ||colspan=2| CVT timing descriptor #3
15–17 ||colspan=2| CVT timing descriptor #4

\mathsf{Vertical\ lines} = (\mathsf{Addressable\ lines\ per\ field}+1)*2

\mathsf{Horizontal\ pixels} = \lfloor\mathsf{Vertical\ lines}*\mathsf{Aspect\ ratio}/8\rfloor*8

=Additional standard timings=

class=wikitable

|+ EDID Additional standard timings 3

! Bytes

colspan=3| Description
0–4colspan=3| {{code|00 00 00}} {{code|F7}} {{code|00}}
5colspan=3| Version: {{code|10}}
rowspan=8| 6Bit 7640×350rowspan=4| @ 85 Hz
Bit 6640×400
Bit 5720×400
Bit 4640×480
Bit 3848×480@ 60 Hz
Bit 2800×600rowspan=3| @ 85 Hz
Bit 11024×768
Bit 01152×864
rowspan=8| 7Bit 7rowspan=4| 1280×768@ 60 Hz (CVT-RB)
Bit 6@ 60 Hz
Bit 5@ 75 Hz
Bit 4@ 85 Hz
Bit 3rowspan=2| 1280×960@ 60 Hz
Bit 2@ 85 Hz
Bit 1rowspan=2| 1280×1024@ 60 Hz
Bit 0@ 85 Hz
rowspan=8| 8Bit 71360×768@ 60 Hz (CVT-RB)
Bit 61280×768@ 60 Hz
Bit 5rowspan=3| 1440×900@ 60 Hz (CVT-RB)
Bit 4@ 75 Hz
Bit 3@ 85 Hz
Bit 2rowspan=4| 1400×1050@ 60 Hz (CVT-RB)
Bit 1@ 60 Hz
Bit 0@ 75 Hz
rowspan=8| 9Bit 7@ 85 Hz
Bit 6rowspan=4| 1680×1050@ 60 Hz (CVT-RB)
Bit 5@ 60 Hz
Bit 4@ 75 Hz
Bit 3@ 85 Hz
Bit 2rowspan=5| 1600×1200@ 60 Hz
Bit 1@ 65 Hz
Bit 0@ 70 Hz
rowspan=8| 10Bit 7@ 75 Hz
Bit 6@ 85 Hz
Bit 5rowspan=2| 1792×1344@ 60 Hz
Bit 4@ 75 Hz
Bit 3rowspan=2| 1856×1392@ 60 Hz
Bit 2@ 75 Hz
Bit 1rowspan=4| 1920×1200@ 60 Hz (CVT-RB)
Bit 0@ 60 Hz
rowspan=5| 11Bit 7@ 75 Hz
Bit 6@ 85 Hz
Bit 5rowspan=2| 1920×1440@ 60 Hz
Bit 4@ 75 Hz
Bits 3–0colspan=2| {{code|0000}} = reserved
12–17colspan=3| Unused, must be {{code|0}}.

CTA EDID Timing Extension Block <span class="anchor" id="CEA-861-E"></span><span class="anchor" id="CEA-861-F"></span><span class="anchor" id="CEA-861"></span><span class="anchor" id="CTA-861"></span>

The CTA EDID Extension was first introduced in EIA/CEA-861.

=CTA-861 Standard=

The ANSI/CTA-861 industry standard, which according to CTA is now their "Most Popular Standard",{{cite web |title=CTA-861 – CTA's Most Popular Standard |url=https://www.cta.tech/Resources/i3-Magazine/i3-Issues/2019/November-December/cta-861-ctas-most-popular-standard |website=Consumer Technology Association® |publisher=CTA |archive-url=https://web.archive.org/web/20221011163310/https://www.cta.tech/Resources/i3-Magazine/i3-Issues/2019/November-December/cta-861-ctas-most-popular-standard |archive-date=11 October 2022}} has since been updated several times, most notably with the 861-B revision (published in May 2002, which added version 3 of the extension, adding Short Video Descriptors and advanced audio capability/configuration information), 861-D (published in July 2006 and containing updates to the audio segments), 861-E in March 2008,{{cite web |title=A DTV Profile for Uncompressed High Speed Digital Interfaces (CTA-861-E) |url=https://shop.cta.tech/products/a-dtv-profile-for-uncompressed-high-speed-digital-interfaces-cta-861-e |website=Consumer Technology Association® |publisher=CTA |access-date=4 August 2023 |language=en}} 861-F, which was published on June 4, 2013,{{cite web |title=A DTV Profile for Uncompressed High Speed Digital Interfaces (CTA-861-F) |url=https://shop.cta.tech/products/a-dtv-profile-for-uncompressed-high-speed-digital-interfaces-cta-861-f |website=Consumer Technology Association® |publisher=CTA |access-date=4 August 2023 |language=en}} 861-H in December 2020,{{cite web |title=A DTV Profile for Uncompressed High Speed Digital Interfaces (ANSI/CTA-861-H) |url=https://shop.cta.tech/products/a-dtv-profile-for-uncompressed-high-speed-digital-interfaces-cta-861-h |website=Consumer Technology Association® |publisher=CTA |access-date=4 August 2023 |language=en}} and, most recently, 861-I, which was published in February 2023.{{cite web |title=A DTV Profile for Uncompressed High Speed Digital Interfaces (ANSI/CTA-861-I) |url=https://shop.cta.tech/collections/standards/products/a-dtv-profile-for-uncompressed-high-speed-digital-interfaces-ansi-cta-861-i |website=Consumer Technology Association® |publisher=CTA |access-date=4 August 2023 |language=en}} Coinciding with the publication of CEA-861-F in 2013, Brian Markwalter, senior vice president, research and standards, stated: "The new edition includes a number of noteworthy enhancements, including support for several new Ultra HD and widescreen video formats and additional colorimetry schemes.”{{cite web |author=Paul Ploumis |url=http://www.scrapmonster.com/news/cea-publishes-new-high-speed-cea-861-f-dtv-interface-standard/1/9294 |title=CEA publishes new high-speed CEA-861-F DTV Interface Standard |website=Scrapmonster.com |date=2013-07-16 |access-date=2017-04-01 |archive-date=2017-04-15 |archive-url=https://web.archive.org/web/20170415111929/http://www.scrapmonster.com/news/cea-publishes-new-high-speed-cea-861-f-dtv-interface-standard/1/9294 |url-status=live }}

Version CTA-861-G,{{cite web|url=https://standards.cta.tech/kwspub/published_docs/CTA-861-G_FINAL_revised_2017.pdf|title=A DTV Profile for Uncompressed High Speed Digital Interfaces |id=CTA-861-G |date=29 November 2017 |access-date=2017-11-30 |archive-url=https://web.archive.org/web/20171130183104/https://standards.cta.tech/kwspub/published_docs/CTA-861-G_FINAL_revised_2017.pdf |archive-date=2017-11-30}} originally published in November 2016, was made available for free in November 2017, along with updated versions -E and -F, after some necessary changes due to a trademark complaint. All CTA standards are free to everyone since May 2018.{{cite web |title=CTA's Entire Library of Industry Standards Now Free to Everyone |url=https://www.cta.tech/News/Press-Releases/2018/May/CTA-s-Entire-Library-of-Industry-Standards-Now-Fre.aspx |website=www.cta.tech |access-date=2 April 2020 |archive-date=29 July 2019 |archive-url=https://web.archive.org/web/20190729051925/https://www.cta.tech/News/Press-Releases/2018/May/CTA-s-Entire-Library-of-Industry-Standards-Now-Fre.aspx |url-status=live }}{{cite web |title=News - "Confidential" HDMI Specifications Docs Hit With DMCA Takedown |url=https://www.tvaddons.co/community/threads/confidential-hdmi-specifications-docs-hit-with-dmca-takedown.63000/ |website=TV ADDONS |access-date=2 April 2020 |archive-date=18 September 2020 |archive-url=https://web.archive.org/web/20200918063655/https://www.tvaddons.co/community/threads/confidential-hdmi-specifications-docs-hit-with-dmca-takedown.63000/ |url-status=live }}

The most recent full version is CTA-861-I,{{cite web |title=A DTV Profile for Uncompressed High Speed Digital Interfaces (ANSI/CTA-861-I) |url=https://shop.cta.tech/collections/standards/products/a-dtv-profile-for-uncompressed-high-speed-digital-interfaces-ansi-cta-861-i |website=Consumer Technology Association® |access-date=29 March 2023 |language=en |archive-date=29 March 2023 |archive-url=https://web.archive.org/web/20230329211803/https://shop.cta.tech/collections/standards/products/a-dtv-profile-for-uncompressed-high-speed-digital-interfaces-ansi-cta-861-i |url-status=live }} published in February 2023, available for free after registration. It combines the previous version, CTA-861-H,{{cite web |url=https://shop.cta.tech/collections/standards/products/a-dtv-profile-for-uncompressed-high-speed-digital-interfaces-cta-861-h |title=A DTV Profile for Uncompressed High Speed Digital Interfaces (ANSI/CTA-861-H) |id=CTA-861-H |date=27 May 2021 |access-date=2021-05-27 |archive-date=2021-06-21 |archive-url=https://web.archive.org/web/20210621100734/https://shop.cta.tech/collections/standards/products/a-dtv-profile-for-uncompressed-high-speed-digital-interfaces-cta-861-h |url-status=live }} from January 2021 with an amendment, CTA-861.6,{{cite web |url=https://shop.cta.tech/collections/standards/products/https-cdn-cta-tech-cta-media-media-shop-standards-2020-cta-861-6v2_final-zip |title=Improvements on Audio and Video Signaling (CTA-861.6) |id=CTA-861.6 |date=2022-03-14 |access-date=2022-06-24 |archive-date=2022-05-17 |archive-url=https://web.archive.org/web/20220517004144/https://shop.cta.tech/collections/standards/products/https-cdn-cta-tech-cta-media-media-shop-standards-2020-cta-861-6v2_final-zip |url-status=live }} published in February 2022 and includes a new formula to calculate Video Timing Formats, OVT.{{cite web |title=OVT - Optimized Video Timing Generator - CTA |url=https://www.cta.tech/Resources/Standards/CTA-861-OVT-Calculator |website=www.cta.tech |publisher=CTA |access-date=4 August 2023}} Other changes include a new annex to elaborate on the audio speaker room configuration system that was introduced with the 861.2 amendment, and some general clarifications and formatting cleanup.

An amendment to CTA-861-I, CTA-861.7,{{cite web |title=Improvements to CTA-861-I (CTA-861.7) |url=https://shop.cta.tech/collections/standards/products/improvements-to-cta-861-i |website=Consumer Technology Association® |access-date=27 June 2024 |language=en }} was published in June 2024. It contains updates to CTA 3D Audio, and clarifications on Content Type Indication, and on 4:2:0 support for VTDBs and VFDBs. It also introduces a new Product ID Data Block, to replace the Manufacturer PNP ID in the first block of the EDID, since the UEFI is phasing out assigning new PNP IDs.

=CTA Extension Block=

Version 1 of the extension block (as defined in CEA−861) allowed the specification of video timings only through the use of 18-byte Detailed Timing Descriptors (DTD) (as detailed in EDID 1.3 data format above). DTD timings are listed in order of preference in the CEA EDID Timing Extension.

Version 2 (as defined in 861-A) added the capability to designate a number of DTDs as "native" (i.e., matching the resolution of the display) and also included some "basic discovery" functionality for whether the display device contains support for "basic audio", YCBCR pixel formats, and underscan.

Version 3 (from the 861-B spec onward) allows two different ways to specify digital video timing formats: As in Version 1 & 2 by the use of 18-byte DTDs, or by the use of the Short Video Descriptor (SVD) (see below). HDMI 1.0–1.3c uses this{{which|date=January 2014}} version.

Version 3 also defines a format for a collection of data blocks, which in turn can contain a number of individual descriptors. This Data Block Collection (DBC) initially had four types of Data Blocks (DBs): Video Data Blocks containing the aforementioned Short Video Descriptor (SVD), Audio Data Blocks containing Short Audio Descriptors (SAD), Speaker Allocation Data Blocks containing information about the speaker configuration of the display device, and Vendor Specific Data Blocks which can contain information specific to a given vendor's use. Subsequent versions of CTA-861 defined additional data blocks.

=CTA Extension data format=

class="wikitable"

! Byte

! colspan=2 | Description

0

| colspan=2 | Extension tag (which kind of extension block this is); {{code|02}} for CTA EDID

1

| colspan=2 | Revision number (version number); {{code|03}} for version 3

2

| colspan=2 | Byte number (decimal) within this block where the 18-byte DTDs begin. If no non-DTD data is present in this extension block, the value should be set to {{code|04}} (the byte after next). If set to {{code|00}}, there are no DTDs present in this block and no non-DTD data.

rowspan=6 | 3

| colspan=2 | With version 2 and up: number of Native DTDs present, other information. Reserved with earlier versions.

Bit 7{{code|1}} if display supports underscan, {{code|0}} if not
Bit 6{{code|1}} if display supports basic audio, {{code|0}} if not
Bit 5{{code|1}} if display supports YCBCR 4{{ratio}}4{{ratio}}4, {{code|0}} if not
Bit 4{{code|1}} if display supports YCBCR 4{{ratio}}2{{ratio}}2, {{code|0}} if not
Bit 3–0Total number of native formats in the DTDs included in this block
rowspan=3 | 4–126

| colspan=2 | With version 3 and up: Data Block Collection, starting at byte 4, ending immediately before the byte specified in byte 2. If byte 2 is {{code|04}}, the collection is of zero length (i.e. not present). If byte 2 is {{code|00}}, no DTDs are present and the DBC takes up the entire remaining EDID block ahead of the checksum. Reserved with earlier versions.

colspan=2 | 18-byte descriptors, starting at the byte specified in byte 2 (if non-zero). Consecutive descriptors are present while the bytes 0–1 of each are not {{code|00 00}}.
colspan=2 | Padding, from the absence of an 18-byte descriptor onwards; must be {{code|00}}.
127

| colspan=2 | Checksum. Value such that the one-byte sum of all 128 bytes is {{code|00}}.

The Data Block Collection contains one or more data blocks detailing video, audio, and speaker placement information about the display. The blocks can be placed in any order, and the initial byte of each block defines both its type and its length:

class="wikitable"

|+ Data block header

Byte

! colspan=2 | Description

rowspan=2 | 0

| Bit 7–5

Block Type Tag

  • {{code|001}} 1: Audio (ADB, containing SADs)
  • {{code|010}} 2: Video (VDB, containing SVDs)
  • {{code|011}} 3: Vendor Specific (VSDB)
  • {{code|100}} 4: Speaker Allocation (SADB)
  • {{code|101}} 5: VESA Display Transfer Characteristic (VESA DTCDB)
  • {{code|110}} 6: Video Format (VFDB, containing VFDs)
  • {{code|111}} 7: Use Extended Tag
Bit 4–0Total number of bytes in this block following this byte.

If the Tag code is 7, an Extended Tag Code is present in the first payload byte of the data block, and the second payload byte represents the first payload byte of the extended data block.

class="wikitable"

|+ Extended Block Type Tag

Byte

! colspan=2 | Description

rowspan=1 | 1

| Bit 7–0

Extended Block Type Tag

  • {{code|00000000}} 0: Video Capability (VCDB)
  • {{code|00000001}} 1: Vendor Specific Video (VSVDB)
  • {{code|00000010}} 2: VESA Display Device (VESA DDDB)
  • {{code|00000011}} 3: reserved for VESA
  • {{code|00000100}} 4: reserved for HDMI
  • {{code|00000101}} 5: Colorimetry (CDB)
  • {{code|00000110}} 6: HDR Static Metadata (HDR SMDB)
  • {{code|00000111}} 7: HDR Dynamic Metadata (HDR DMDB)
  • {{code|00001000}} 8: Native Video Resolution (NVRDB)
  • 9-12: reserved for video
  • {{code|00001101}} 13: Video Format Preference (VFPDB)
  • {{code|00001110}} 14: YCBCR 4:2:0 Video (Y420VDB)
  • {{code|00001111}} 15: YCBCR 4:2:0 Capability Map (Y420CMDB)
  • {{code|00010000}} 16: reserved for CTA (CTA MAF)
  • {{code|00010001}} 17: Vendor Specific Audio (VSADB)
  • {{code|00010010}} 18: HDMI Audio (HDMI ADB)
  • {{code|00010011}} 19: Room Configuration (RCDB)
  • {{code|00010100}} 20: Speaker Location (SLDB, containing SLDs)
  • 21-31: reserved for audio
  • {{code|00100000}} 32: InfoFrame (IFDB)
  • {{code|00100001}} 33: reserved
  • {{code|00100010}} 34: Type VII video timing (T7VTDB)
  • {{code|00100011}} 35: Type VIII video timing (T8VTDB)
  • 36-41: reserved
  • {{code|00101010}} 42: Type X video timing (T10VTDB)
  • 42-119: reserved
  • {{code|01111000}} 120: HDMI Forum EDID Extension Override (HF-EEODB)
  • {{code|01111001}} 121: HDMI Forum Sink Capbility (HF-SCDB)
  • {{code|01111010}} 122: HDMI Forum Source-Based Tone Mapping (HF-SBTMDB)
  • 123-127: reserved for HDMI
  • else: reserved

Once one data block has ended, the next byte is assumed to be the beginning of the next data block. This is the case until the byte (designated in byte 2, above) where the DTDs are known to begin.

= CTA Data Blocks =

As noted, several data blocks are defined by the extension.

== Video Data Blocks ==

The Video Data Blocks will contain one or more 1-byte Short Video Descriptors (SVDs).

class="wikitable"
Byte

! colspan=2 | Description

0

| colspan=2 | Data block header

rowspan=2 | 1

| Bit 7

1 to designate that this should be considered a "native" resolution, 0 for non-native. Used for 7-bit VICs 1 – 64 only, otherwise this is the {{abbr|MSB|most significant bit}} for the 8-bit VIC.
Bit 6–0{{abbr|VIC|Video Identification Code}}: Index value to a table of standard resolutions/timings from EIA/CEA-861:

=== EIA/CEA-861 predefined standard resolutions and timings ===

class="wikitable sortable"

|+ EIA/CEA-861 standard resolutions and timings

rowspan=2 | {{abbr|VIC|Video Identification Code}}

! rowspan=2 | Short name

! colspan=2 | Aspect ratio

! colspan=3 | Clock

! colspan=2 | Active

! colspan=2 | Total

! rowspan=2 | Field rate (Hz)

{{abbr|DAR|display aspect ratio}}

! {{abbr|PAR|pixel aspect ratio}}

! Pixel (MHz)

! {{abbr|V (Hz)|Vertical frequency}}

! {{abbr|H (kHz)|Horizontal frequency}}

!title="horizontal: pixels per line"| H

title="vertical: lines"| V

!title="horizontal"| H

title="vertical"| V
1title="640x480p"|DMT0659{{ratio|4|3}}{{ratio|1|1}}25.17559.9431.46964048080052560
2title="720x480p"| 480p{{ratio|4|3}}{{ratio|8|9}}2759.9431.46972048085852560
3title="720x480p"| 480pH{{ratio|16|9}}{{ratio|32|27}}2759.9431.46972048085852560
4title="1280x720p"| 720p{{ratio|16|9}}{{ratio|1|1}}74.256045.01280720165075060
5title="1920x1080i"| 1080i{{ratio|16|9}}{{ratio|1|1}}74.256033.7519205402200562.560
6title="720(1440)x480i"| 480i{{ratio|4|3}}{{ratio|8|9}}2759.9415.73414402401716262.560
7title="720(1440)x480i"| 480iH{{ratio|16|9}}{{ratio|32|27}}2759.9415.73414402401716262.560
8title="720(1440)x240p"| 240p{{ratio|4|3}}{{ratio|4|9}}2759.82615.73414402401716262.560
9title="720(1440)x240p"| 240pH{{ratio|16|9}}{{ratio|16|27}}2759.82615.73414402401716262.560
10title="720(2880)x480i"| 480i4x{{ratio|4|3}}2:9-20:95459.9415.73428802403432262.560
11title="720(2880)x480i"| 480i4xH{{ratio|16|9}}8:27-80:275459.9415.73428802403432262.560
12title="720(2880)x240p"| 240p4x{{ratio|4|3}}1:9-10:9546015.73428802403432262.560
13title="720(2880)x240p"| 240p4xH{{ratio|16|9}}4:27-40:27546015.73428802403432262.560
14title="720(1440)x480p"| 480p2x{{ratio|4|3}}4:9, {{ratio|8|9}}5459.9431.4691440480171652560
15title="720(1440)x480p"| 480p2xH{{ratio|16|9}}16:27, {{ratio|32|27}}5459.9431.4691440480171652560
16title="1920x1080p"| 1080p{{ratio|16|9}}{{ratio|1|1}}148.56067.5192010802200112560
17title="720x576p"| 576p{{ratio|4|3}}{{ratio|16|15}}275031.2572057686462550
18title="720x576p"| 576pH{{ratio|16|9}}{{ratio|64|45}}275031.2572057686462550
19title="1280x720p"| 720p50{{ratio|16|9}}{{ratio|1|1}}74.255037.51280720198075050
20title="1920x1080i"| 1080i25{{ratio|16|9}}{{ratio|1|1}}74.255028.12519205402640562.550
21title="720(1440)x576i"| 576i{{ratio|4|3}}{{ratio|16|15}}275015.62514402881728312.550
22title="720(1440)x576i"| 576iH{{ratio|16|9}}{{ratio|64|45}}275015.62514402881728312.550
23title="720(1440)x288p"| 288p{{ratio|4|3}}{{ratio|8|15}}275015.6251440288172831350
24title="720(1440)x288p"| 288pH{{ratio|16|9}}{{ratio|32|45}}275015.6251440288172831350
25title="720(2880)x576i"| 576i4x{{ratio|4|3}}2:15-20:15545015.62528802883456312.550
26title="720(2880)x576i"| 576i4xH{{ratio|16|9}}16:45-160:45545015.62528802883456312.550
27title="720(2880)x288p"| 288p4x{{ratio|4|3}}1:15-10:15545015.6252880288345631350
28title="720(2880)x288p"| 288p4xH{{ratio|16|9}}8:45-80:45545015.6252880288345631350
29title="720(1440)x576p"| 576p2x{{ratio|4|3}}8:15, {{ratio|16|15}}545031.251440576172862550
30title="720(1440)x576p"| 576p2xH{{ratio|16|9}}32:45, {{ratio|64|45}}545031.251440576172862550
31title="1920x1080p"| 1080p50{{ratio|16|9}}{{ratio|1|1}}148.55056.25192010802640112550
32title="1920x1080p"| 1080p24{{ratio|16|9}}{{ratio|1|1}}74.2523.98/24271920108027501125Low
33title="1920x1080p"| 1080p25{{ratio|16|9}}{{ratio|1|1}}74.252528.1251920108026401125Low
34title="1920x1080p"| 1080p30{{ratio|16|9}}{{ratio|1|1}}74.2529.97/3033.751920108022001125Low
35title="720(2880)x480p"| 480p4x{{ratio|4|3}}2:9, 4:9, {{ratio|8|9}}10859.9431.46928802403432262.560
36title="720(2880)x480p"| 480p4xH{{ratio|16|9}}8:27, 16:27, {{ratio|32|27}}10859.9431.46928802403432262.560
37title="720(2880)x576p"| 576p4x{{ratio|4|3}}4:15, 8:15, {{ratio|16|15}}1085031.252880576345662550
38title="720(2880)x576p"| 576p4xH{{ratio|16|9}}16:45, 32:45, {{ratio|64|45}}1085031.252880576345662550
39title="1920x1080i(1250)"| 1080i25{{ratio|16|9}}{{ratio|1|1}}725031.251920540230462550
40title="1920x1080i"| 1080i50{{ratio|16|9}}{{ratio|1|1}}148.510056.2519205402640562.5100
41title="1280x720p"| 720p100{{ratio|16|9}}{{ratio|1|1}}148.510045.012807201980750100
42title="720x576p"| 576p100{{ratio|4|3}}{{ratio|16|15}}5410062.5720576864625100
43title="720x576p"| 576p100H{{ratio|16|9}}{{ratio|64|45}}5410062.5720576864625100
44title="720(1440)x576i"| 576i50{{ratio|4|3}}{{ratio|16|15}}5410031.2514405761728625100
45title="720(1440)x576i"| 576i50H{{ratio|16|9}}{{ratio|64|45}}5410031.2514405761728625100
46title="1920x1080i"| 1080i60{{ratio|16|9}}{{ratio|1|1}}148.5119.88/12067.519205402200562.5120
47title="1280x720p"| 720p120{{ratio|16|9}}{{ratio|1|1}}148.5119.88/12090.012807201650750120
48title="720x480p"| 480p119{{ratio|4|3}}{{ratio|8|9}}54119.88/12062.937720480858525120
49title="720x480p"| 480p119H{{ratio|16|9}}{{ratio|32|27}}54119.88/12062.937720480858525120
50title="720(1440)x480i"| 480i59{{ratio|4|3}}{{ratio|16|15}}54119.88/12031.46914404801716525120
51title="720(1440)x480i"| 480i59H{{ratio|16|9}}{{ratio|64|45}}54119.88/12031.46914404801716525120
52title="720x576p"| 576p200{{ratio|4|3}}{{ratio|16|15}}108200125.0720576864625200
53title="720x576p"| 576p200H{{ratio|16|9}}{{ratio|64|45}}108200125.0720576864625200
54title="720(1440)x576i"| 576i100{{ratio|4|3}}{{ratio|16|15}}10820062.514402881728312.5200
55title="720(1440)x576i"| 576i100H{{ratio|16|9}}{{ratio|64|45}}10820062.514402881728312.5200
56title="720x480p"| 480p239{{ratio|4|3}}{{ratio|8|9}}108239.76125.874720480858525240
57title="720x480p"| 480p239H{{ratio|16|9}}{{ratio|32|27}}108239.76125.874720480858525240
58title="720(1440)x480i"| 480i119{{ratio|4|3}}{{ratio|8|9}}108239.7662.93714402401716262.5240
59title="720(1440)x480i"| 480i119H{{ratio|16|9}}{{ratio|32|27}}108239.7662.93714402401716262.5240
60title="1280x720p"| 720p24{{ratio|16|9}}{{ratio|1|1}}59.423.98/2418.012807203300750Low
61title="1280x720p"| 720p25{{ratio|16|9}}{{ratio|1|1}}74.252518.7512807203960750Low
62title="1280x720p"| 720p30{{ratio|16|9}}{{ratio|1|1}}74.2529.97/3022.512807203300750Low
63title="1920x1080p"| 1080p120{{ratio|16|9}}{{ratio|1|1}}297119.88/120135.01920108022001125120
64title="1920x1080p"| 1080p100{{ratio|16|9}}{{ratio|1|1}}297100112.51920108026401125100
65title="1280x720p"| 720p24{{ratio|64|27}}{{ratio|4|3}}59.423.98/2418.012807203300750Low
66title="1280x720p"| 720p25{{ratio|64|27}}{{ratio|4|3}}74.252518.7512807203960750Low
67title="1280x720p"| 720p30{{ratio|64|27}}{{ratio|4|3}}74.2529.97/3022.512807203300750Low
68title="1280x720p"| 720p50{{ratio|64|27}}{{ratio|4|3}}74.255037.51280720198075050
69title="1280x720p"| 720p{{ratio|64|27}}{{ratio|4|3}}74.256045.01650750165075060
70title="1280x720p"| 720p100{{ratio|64|27}}{{ratio|4|3}}148.510075.012807201980750100
71title="1280x720p"| 720p120{{ratio|64|27}}{{ratio|4|3}}148.5119.88/12090.012807201650750120
72title="1920x1080p"| 1080p24{{ratio|64|27}}{{ratio|4|3}}74.2523.98/24271920108027501125Low
73title="1920x1080p"| 1080p25{{ratio|64|27}}{{ratio|4|3}}74.252528.1251920108026401125Low
74title="1920x1080p"| 1080p30{{ratio|64|27}}{{ratio|4|3}}74.2529.97/3033.751920108022001125Low
75title="1920x1080p"| 1080p50{{ratio|64|27}}{{ratio|4|3}}148.55056.25192010802640112550
76title="1920x1080p"| 1080p{{ratio|64|27}}{{ratio|4|3}}148.56067.5192010802200112560
77title="1920x1080p"| 1080p100{{ratio|64|27}}{{ratio|4|3}}297.0100112.51920108026401125100
78title="1920x1080p"| 1080p120{{ratio|64|27}}{{ratio|4|3}}297.0119.88/120135.01920108022001125120
79title="1680x720p"| 720p2x24{{ratio|64|27}}{{ratio|64|63}}59.423.98/2418.016807203300750Low
80title="1680x720p"| 720p2x25{{ratio|64|27}}{{ratio|64|63}}59.42518.7516807203168750Low
81title="1680x720p"| 720p2x30{{ratio|64|27}}{{ratio|64|63}}59.429.97/3022.516807202640750Low
82title="1680x720p"| 720p2x50{{ratio|64|27}}{{ratio|64|63}}82.55037.51680720220075050
83title="1680x720p"| 720p2x{{ratio|64|27}}{{ratio|64|63}}996045.01680720220075060
84title="1680x720p"| 720p2x100{{ratio|64|27}}{{ratio|64|63}}16510082.516807202000825100
85title="1680x720p"| 720p2x120{{ratio|64|27}}{{ratio|64|63}}198119.88/12099.016807202000825120
86title="2560x1080p"| 1080p2x24{{ratio|64|27}}{{ratio|1|1}}9923.98/2426.42560108037501100Low
87title="2560x1080p"| 1080p2x25{{ratio|64|27}}{{ratio|1|1}}902528.1252560108032001125Low
88title="2560x1080p"| 1080p2x30{{ratio|64|27}}{{ratio|1|1}}118.829.97/3033.752560108035201125Low
89title="2560x1080p"| 1080p2x50{{ratio|64|27}}{{ratio|1|1}}185.6255056.25256010803000112550
90title="2560x1080p"| 1080p2x{{ratio|64|27}}{{ratio|1|1}}1986066.0256010803000110060
91title="2560x1080p"| 1080p2x100{{ratio|64|27}}{{ratio|1|1}}371.25100125.02560108029701250100
92title="2560x1080p"| 1080p2x120{{ratio|64|27}}{{ratio|1|1}}495119.88/120150.02560108033001250120
93title="3840x2160p"| 2160p24{{ratio|16|9}}{{ratio|1|1}}29723.98/24543840216055002250Low
94title="3840x2160p"| 2160p25{{ratio|16|9}}{{ratio|1|1}}2972556.253840216052802250Low
95title="3840x2160p"| 2160p30{{ratio|16|9}}{{ratio|1|1}}29729.97/3067.53840216044002250Low
96title="3840x2160p"| 2160p50{{ratio|16|9}}{{ratio|1|1}}59450112.5384021605280225050
97title="3840x2160p"| 2160p60{{ratio|16|9}}{{ratio|1|1}}59460135.0384021604400225060
98title="4096x2160p"| 2160p24{{ratio|256|135}}{{ratio|1|1}}29723.98/2467.54096216055002250Low
99title="4096x2160p"| 2160p25{{ratio|256|135}}{{ratio|1|1}}29725112.54096216052802250Low
100title="4096x2160p"| 2160p30{{ratio|256|135}}{{ratio|1|1}}29729.97/30135.04096216044002250Low
101title="4096x2160p"| 2160p50{{ratio|256|135}}{{ratio|1|1}}59450112.5409621605280225050
102title="4096x2160p"| 2160p{{ratio|256|135}}{{ratio|1|1}}59460135.0409621604400225060
103title="3840x2160p"| 2160p24{{ratio|64|27}}{{ratio|4|3}}29723.98/2467.53840216055002250Low
104title="3840x2160p"| 2160p25{{ratio|64|27}}{{ratio|4|3}}29725112.53840216052802250Low
105title="3840x2160p"| 2160p30{{ratio|64|27}}{{ratio|4|3}}29729.97/30135.03840216044002250Low
106title="3840x2160p"| 2160p50{{ratio|64|27}}{{ratio|4|3}}59450112.5384021605280225050
107title="3840x2160p"| 2160p{{ratio|64|27}}{{ratio|4|3}}59460135.0384021604400225060
108title="1280x720p"| 720p48{{ratio|16|9}}{{ratio|1|1}}9047.96/4836.012807202500750Low
109title="1280x720p"| 720p48{{ratio|64|27}}{{ratio|4|3}}9047.96/4836.012807202500750Low
110title="1680x720p"| 720p2x48{{ratio|64|27}}{{ratio|64|63}}9947.96/4836.016807202750825Low
111title="1920x1080p"| 1080p48{{ratio|16|9}}{{ratio|1|1}}148.547.96/48541920108027501125Low
112title="1920x1080p"| 1080p48{{ratio|64|27}}{{ratio|4|3}}148.547.96/48541920108027501125Low
113title="2560x1080p"| 1080p2x48{{ratio|64|27}}{{ratio|1|1}}19847.96/4852.82560108037501100Low
114title="3840x2160p"| 2160p48{{ratio|16|9}}{{ratio|1|1}}59447.96/481083840216055002250Low
115title="4096x2160p"| 2160p48{{ratio|256|135}}{{ratio|1|1}}59447.96/481084096216055002250Low
116title="3840x2160p"| 2160p48{{ratio|64|27}}{{ratio|4|3}}59447.96/481083840216055002250Low
117title="3840x2160p"| 2160p100{{ratio|16|9}}{{ratio|1|1}}1188100225.03840216052802250100
118title="3840x2160p"| 2160p120{{ratio|16|9}}{{ratio|1|1}}1188119.88/120270.03840216044002250120
119title="3840x2160p"| 2160p100{{ratio|64|27}}{{ratio|4|3}}1188100225.03840216052802250100
120title="3840x2160p"| 2160p120{{ratio|64|27}}{{ratio|4|3}}1188119.88/120270.03840216044002250120
121title="5120x2160p"| 2160p2x24{{ratio|64|27}}{{ratio|1|1}}39623.98/2452.85120216075002200Low
122title="5120x2160p"| 2160p2x25{{ratio|64|27}}{{ratio|1|1}}3962555.05120216072002200Low
123title="5120x2160p"| 2160p2x30{{ratio|64|27}}{{ratio|1|1}}39629.97/3066.05120216060002200Low
124title="5120x2160p"| 2160p2x48{{ratio|64|27}}{{ratio|1|1}}742.547.96/48118.85120216062502450Low
125title="5120x2160p"| 2160p2x50{{ratio|64|27}}{{ratio|1|1}}742.550112.5512021606600225050
126title="5120x2160p"| 2160p2x{{ratio|64|27}}{{ratio|1|1}}742.560135.0512021605500225060
127title="5120x2160p"| 2160p2x100{{ratio|64|27}}{{ratio|1|1}}1485100225.05120216066002250100
128—192colspan="12" |reserved, value range is used in SVD to indicate native timing for numbers 1—64.
193title="5120x2160p"| 2160p2x120{{ratio|64|27}}{{ratio|1|1}}1485.0119.88/1202705120216055002250120
194title="7680x4320p"| 4320p24{{ratio|16|9}}{{ratio|1|1}}1188.023.98/2410876804320110004500Low
195title="7680x4320p"| 4320p25{{ratio|16|9}}{{ratio|1|1}}1188.02511076804320108004400Low
196title="7680x4320p"| 4320p30{{ratio|16|9}}{{ratio|1|1}}1188.029.97/301327680432090004400Low
197title="7680x4320p"| 4320p48{{ratio|16|9}}{{ratio|1|1}}2376.047.96/4821676804320110004500Low
198title="7680x4320p"| 4320p50{{ratio|16|9}}{{ratio|1|1}}2376.0502207680432010800440050
199title="7680x4320p"| 4320p{{ratio|16|9}}{{ratio|1|1}}2376.060264768043209000440060
200title="7680x4320p"| 4320p100{{ratio|16|9}}{{ratio|1|1}}4752.010045076804320105604500100
201title="7680x4320p"| 4320p120{{ratio|16|9}}{{ratio|1|1}}4752.0119.88/1205407680432088004500120
202title="7680x4320p"| 4320p24{{ratio|64|27}}{{ratio|4|3}}1188.023.98/2410876804320110004500Low
203title="7680x4320p"| 4320p25{{ratio|64|27}}{{ratio|4|3}}1188.02511076804320108004400Low
204title="7680x4320p"| 4320p30{{ratio|64|27}}{{ratio|4|3}}1188.029.97/301327680432090004400Low
205title="7680x4320p"| 4320p48{{ratio|64|27}}{{ratio|4|3}}2376.047.96/4821676804320110004500Low
206title="7680x4320p"| 4320p50{{ratio|64|27}}{{ratio|4|3}}2376.0502207680432010800440050
207title="7680x4320p"| 4320p{{ratio|64|27}}{{ratio|4|3}}2376.060264768043209000440060
208title="7680x4320p"| 4320p100{{ratio|64|27}}{{ratio|4|3}}4752.010045076804320105604500100
209title="7680x4320p"| 4320p120{{ratio|64|27}}{{ratio|4|3}}4752.0119.88/1205407680432088004500120
210title="10240x4320p"| 4320p2x24{{ratio|64|27}}{{ratio|1|1}}1485.023.98/24118.8102404320125004950Low
211title="10240x4320p"| 4320p2x25{{ratio|64|27}}{{ratio|1|1}}1485.025110102404320135004400Low
212title="10240x4320p"| 4320p2x30{{ratio|64|27}}{{ratio|1|1}}1485.029.97/30135102404320110004500Low
213title="10240x4320p"| 4320p2x48{{ratio|64|27}}{{ratio|1|1}}2970.047.96/48237.6102404320125004950Low
214title="10240x4320p"| 4320p2x50{{ratio|64|27}}{{ratio|1|1}}2970.05022010240432013500440050
215title="10240x4320p"| 4320p2x{{ratio|64|27}}{{ratio|1|1}}2970.06027010240432011000440060
216title="10240x4320p"| 4320p2x100{{ratio|64|27}}{{ratio|1|1}}5940.0100450102404320132004500100
217title="10240x4320p"| 4320p2x120{{ratio|64|27}}{{ratio|1|1}}5940.0119.88/120540102404320110004500120
218title="4096x2160p"| 2160p100{{ratio|256|135}}{{ratio|1|1}}1188.01002254096216052802250100
219title="4096x2160p"| 2160p120{{ratio|256|135}}{{ratio|1|1}}1188.0119.88/1202704096216044002250120

Notes: Parentheses indicate instances where pixels are repeated to meet the minimum speed requirements of the interface. For example, in the 720x240p case, the pixels on each line are double-clocked. In the (2880)x480i case, the number of pixels on each line, and thus the number of times that they are repeated, is variable, and is sent to the DTV monitor by the source device.

Increased Hactive expressions include “2x” and “4x” indicate two and four times the reference resolution, respectively.

Video modes with vertical refresh frequency being a multiple of 6{{nbsp}}Hz (i.e. 24, 30, 60, 120, and 240{{nbsp}}Hz) are considered to be the same timing as equivalent NTSC modes where vertical refresh is adjusted by a factor of 1000/1001. As VESA DMT specifies 0.5% pixel clock tolerance, which 5 times more than the required change, pixel clocks can be adjusted to maintain NTSC compatibility; typically, 240p, 480p, and 480i modes are adjusted, while 576p, 576i and HDTV formats are not.

  • The EIA/CEA-861 and 861-A standards included only numbers 1–7 and numbers 17–22 (only in -A) above (but not as short video descriptors which were introduced in EIA/CEA-861-B) and are considered primary video format timings.
  • The EIA/CEA-861-B standard has the first 34 short video descriptors above. It is used by HDMI 1.0–1.2a.
  • The EIA/CEA-861-C and -D standards have the first 59 short video descriptors above. EIA/CEA-861-D is used by HDMI 1.3–1.3c.
  • The EIA/CEA-861-E standard has the first 64 short video descriptors above. It is used by HDMI 1.4–1.4b.
  • The CTA-861-F standard has the first 107 short video descriptors above. It is used by HDMI 2.0–2.0b.
  • The CTA-861-G standard has the full list of 154 (1–127, 193–219) short video descriptors above. It is used by HDMI 2.1.

== Audio Data Blocks ==

The Audio Data Blocks contain one or more 3-byte Short Audio Descriptors (SADs). Each SAD details audio format, channel number, and bitrate/resolution capabilities of the display as follows:

class="wikitable"

|+ Short Audio Descriptor

Byte

! colspan=2 | Description

0

| colspan=2 | Data block header

rowspan=4 | 1

| colspan=2 | Format and number of channels:

Bit 7Reserved, {{code|0}}
Bit 6–3Audio format code

Bit 2–0Number of channels minus 1
  • {{code|000}} 1 channel
  • {{code|001}} 2 channels
  • {{code|010}} 3 channels
  • {{code|011}} 4 channels
  • {{code|100}} 5 channels
  • {{code|101}} 6 channels
  • {{code|110}} 7 channels
  • {{code|111}} 8 channels
    • rowspan=9 | 2

    | colspan=2 | Sampling frequencies (kHz) supported:

    Bit 7Reserved, {{code|0}}
    Bit 6192
    Bit 5176
    Bit 496
    Bit 388
    Bit 248
    Bit 144.1
    Bit 032
    rowspan=11 | 3

    | colspan=2 | Bitrate / format dependent:

    colspan=2 | For codec 1, LPCM:
    Bits 7–3Reserved
    Bit 224-bit depth
    Bit 120-bit depth
    Bit 016-bit depth
    colspan=2 | For audio format codecs 2–8, the maximum supported bitrate in bit/s, divided by 8000.
    colspan=2 | For audio format codecs 9–14, format dependent value.
    colspan=2 | For audio format codec 15 (Extension):
    Bit 7–3Audio format extended code

    • {{code|00000}} 0: reserved
    • {{code|00001}} 1: Not used
    • {{code|00010}} 2: Not used
    • {{code|00011}} 3: Not used
    • {{code|00100}} 4: MPEG-4 HE AAC
    • {{code|00101}} 5: MPEG-4 HE AAC v2
    • {{code|00110}} 6: MPEG-4 AAC LC
    • {{code|00111}} 7: DRA
    • {{code|01000}} 8: MPEG-4 HE AAC + MPEG Surround
    • {{code|01001}} 9: reserved
    • {{code|01010}} 10: MPEG-4 HE AAC LC + MPEG Surround
    • {{code|01011}} 11: MPEG-H 3D Audio
    • {{code|01100}} 12: AC-4
    • {{code|01101}} 13: Linear pulse-code modulation (LPCM 3D Audio)
    • {{code|01110}} 14: Auro-Cx
    • {{code|01111}} 15: MPEG-D USAC
    • else reserved
    Bits 2–0format dependent value

    == Vendor Specific Data Block ==

    A Vendor Specific Data Block (if any) contains as its first three bytes the vendor's IEEE 24-bit registration number,{{cite web |title=Welcome to The Public Listing For IEEE Standards Registration Authority |url=https://regauth.standards.ieee.org/standards-ra-web/pub/view.html#registries |website=IEEE |access-date=1 April 2020 |archive-date=13 May 2020 |archive-url=https://web.archive.org/web/20200513124838/https://regauth.standards.ieee.org/standards-ra-web/pub/view.html#registries |url-status=live }} least significant byte first. The remainder of the Vendor Specific Data Block is the "data payload", which can be anything the vendor considers worthy of inclusion in this EDID extension block. For example, IEEE registration number {{code|00 0C 03}} means this is a "HDMI Licensing, LLC" specific data block (contains HDMI 1.4 info), {{code|C4 5D D8}} means this is a "HDMI Forum" specific data block (contains HDMI 2.0 info), {{code|00 D0 46}} means this is "DOLBY LABORATORIES, INC." (contains Dolby Vision info) and {{code|90 84 8b}} is "HDR10+ Technologies, LLC" (contains HDR10+ info as part of HDMI 2.1 Amendment A1 standard{{cite web |title=edid-decode.git - edid-decode main repository |url=https://git.linuxtv.org/edid-decode.git/commit/?id=dc8afbf7e3001587e27695288ff8c259249256b1 |website=git.linuxtv.org |access-date=2 April 2020 |archive-date=1 August 2020 |archive-url=https://web.archive.org/web/20200801131640/https://git.linuxtv.org/edid-decode.git/commit/?id=dc8afbf7e3001587e27695288ff8c259249256b1 |url-status=live }}). It starts with a two byte source physical address, least significant byte first. The source physical address provides the CEC physical address for upstream CEC devices. HDMI 1.3a specifies some requirements for the data payload.

    class="wikitable"

    |+ Vendor Specific Data Block for "HDMI Licensing LLC"

    Byte

    ! colspan=2 | Description

    0

    | colspan=2 | Data block header

    1–3

    | colspan=2 | IEEE Registration Identifier (little endian)

    4–5

    | colspan=2 | Components of Source Physical Addresssee section 8.7 of HDMI 1.3a

    rowspan=9 | 6

    | colspan=2 | (optional) {{code|1}}, supported; {{code|0}}, unsupported:

    Bit 7A function that needs info from ACP or ISRC packets
    Bit 616-bit-per-channel deep color (48-bit)
    Bit 512-bit-per-channel deep color (36-bit)
    Bit 410-bit-per-channel deep color (30-bit)
    Bit 34{{ratio}}4{{ratio}}4 in deep color modes
    Bit 2Reserved, {{code|0}}
    Bit 1Reserved, {{code|0}}
    Bit 0DVI Dual Link Operation
    7

    | colspan=2 | (optional) Maximum TMDS frequency. {{code|0}}, unspecified; else, Max_TMDS_Frequency / 5{{nbsp}}MHz

    rowspan=4 | 8

    | colspan=2 | (optional) Latency fields indicators {{code|1}}, present; {{code|0}}, absent:

    Bit 7Latency fields
    Bit 6Interlaced latency fields. Absent if latency fields are absent.
    Bits 5–0Reserved, {{code|0}}
    9

    | Video latency

    		rowspan=4| optional; if indicated, value = 1 + ms/2 with a max. of 251 meaning 500 ms
    10

    | Audio latency
    (video delay for progressive sources)

    11

    | Interlaced video latency

    12

    | Interlaced audio latency
    (video delay for interlaced sources)

    13+

    | colspan=2 | Additional bytes may be present, but the HDMI spec. says they shall be {{code|00}}.

    == Speaker Allocation Data Block ==

    If a Speaker Allocation Data Block is present, it will consist of three bytes. The first and second bytes contain information about which speakers (or speaker pairs) are present in the display device:

    class="wikitable"

    |+ Speaker Allocation Data Block

    Byte

    ! colspan=2 | Description

    0

    | colspan=2 | Data block header

    rowspan=9 | 1

    | colspan=2 | {{code|1}}, present; {{code|0}}, absent:

    Bit 7Front left/right wide (FLw/FRw)
    Bit 6Deprecated, was Rear left/right center (RLC/RRC)
    Bit 5Front left/right center (FLc/FRc)
    Bit 4Back center (BC)
    Bit 3Back left/right (BL/BR)
    Bit 2Front center (FC)
    Bit 1Low-frequency effects (LFE)
    Bit 0Front left/right (FL/FR)
    rowspan=9 | 2
    Bit 7Deprecated, was Top side left/right (TpSiL/TpSiR)
    Bit 6Deprecated, was Side left/right (SiL/SiR)
    Bit 5Deprecated, was Top back center (TpBC)
    Bit 4Deprecated, was Low-frequency effects 2 (LFE2)
    Bit 3Left surround/right surround (LS/RS)
    Bit 2Top front center (TpFC)
    Bit 1Top center (TpC)
    Bit 0Top front left/right (TpFL/TpFR)
    rowspan=4 | 3

    | Bits 7-3

    		Reserved, {{code|0}}
    Bit 2Deprecated, was Bottom front left/right (BtFL/BtFR)
    Bit 1Deprecated, was Bottom front center (BtFC)
    Bit 0Deprecated, was Top back left/right (TpBL/TpBR)

    Some speaker flags have been deprecated in the SADB, but are still available in the RCDB's SPM. These speakers could not be indicated with a CA value in the Audio InfoFrame, and can only be used with Delivery According to the Speaker Mask, which corresponds to the RCDB only.

    == Room Configuration Data Block ==

    The Room Configuration Data Block and Speaker Location Data Blocks describe the speaker setup using room coordinates.

    class="wikitable"

    |+ Room Configuration Data Block

    Byte

    ! colspan=2 | Description

    rowspan=3 | 0colspan=2| Data block header
    Bits 7-5{{code|111}}=7, block type tag
    Bits 4-0Length of payload data that follows this block, in bytes
    1colspan=2| {{code|13}} = extended tag code
    rowspan=5 | 3colspan=2| Configuration
    Bit 7Display data is valid
    Bit 6Speaker count is valid
    Bit 5Speaker location descriptors (SLD) are present
    Bits 4-0Speaker count (1-32)
    rowspan=9 | 4

    | colspan=2 | Speaker presence mask 1 (SPM1): {{code|1}}, present; {{code|0}}, absent

    Bit 7Front left/right wide (FLw/FRw)
    Bit 6Deprecated, was Rear left/right center (RLC/RRC)
    Bit 5Front left/right center (FLc/FRc)
    Bit 4Back center (BC)
    Bit 3Back left/right (BL/BR)
    Bit 2Front center (FC)
    Bit 1Low-frequency effects 1 (LFE1)
    Bit 0Front left/right (FL/FR)
    rowspan=9 | 5

    | colspan=2 | Speaker presence mask 2 (SPM2): {{code|1}}, present; {{code|0}}, absent

    Bit 7Top side left/right (TpSiL/TpSiR)
    Bit 6Side left/right (SiL/SiR)
    Bit 5Top back center (TpBC)
    Bit 4Low-frequency effects 2 (LFE2)
    Bit 3Left/right surround (LS/RS)
    Bit 2Top front center (TpFC)
    Bit 1Top center (TpC)
    Bit 0Top front left/right (TpFL/TpFR)
    rowspan=6 | 6

    | colspan=2 | Speaker presence mask 3 (SPM3): {{code|1}}, present; {{code|0}}, absent

    Bits 7-4Reserved, {{code|0}}
    Bit 3Deprecated, was Top left/right surround (TpLS/TpRS)
    Bit 2Bottom front left/right (BtFL/BtFR)
    Bit 1Bottom front center (BtFC)
    Bit 0Top back left/right (TpBL/TpBR)
    7-9colspan=2 | Maximum distance from the primary listening position to the farthest speakers along X, Y, Z axes, if speaker location descriptors (SLD) blocks are present; otherwise {{code|00}} = undefined
    10-13colspan=2 | Distance from the primary listening position to the center of display along X, Y, Z axes; {{code|00}} = undefined when display data flag is not set

    References

    {{Reflist}}

    External links

    • [https://git.linuxtv.org/edid-decode.git/ edid-decode] utility
    • [http://www.edidreader.com/ edidreader.com] – Web Based EDID Parser
    • [https://github.com/linuxhw/EDID Edid Repository] – EDID files repository
    • [https://glenwing.github.io/docs/ Display Industry Standards Archive]
    • [https://www.uefi.org/pnp_id_list UEFI Forum PNP IDs]

    {{Display technology}}

    Category:Display technology

    Category:VESA