Hilscher netx network controller
The netX network controller family (based on ASICs), developed by Hilscher Gesellschaft für Systemautomation mbH, is a solution for implementing all proven Fieldbus and Real-Time Ethernet systems. It was the first Multi-Protocol ASIC which combines Real-Time-Ethernet and Fieldbus System in one solution. The Multiprotocol functionality is done over a flexible cpu sub system called XC. Through exchanging some microcode the XC is able to realize beside others a PROFINET IRT Switch, EtherCAT Slave, Ethernet Powerlink HUB, PROFIBUS, CAN bus, CC-Link Industrial Networks Interface.
The Hilscher netX family
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| Controller | [http://www.hilscher.com/products/product-groups/network-controller/asics/netx-52/ netX 52] | [http://www.hilscher.com/products/product-groups/network-controller/asics/netx-51/ netX 51]
![https://www.hilscher.com/products/product-groups/network-controller/asics/netx-90/?autoLang=false&cHash=91c887bf6862bda1c9b908e4d539e8e7 netX 90] {{Webarchive|url=https://web.archive.org/web/20210709184319/https://www.hilscher.com/products/product-groups/network-controller/asics/netx-90/?autoLang=false&cHash=91c887bf6862bda1c9b908e4d539e8e7 |date=2021-07-09 }} | [http://www.hilscher.com/products/product-groups/network-controller/asics/netx-100/ netX 100] | [http://www.hilscher.com/products/product-groups/network-controller/asics/netx-500/ netX 500] | |
|---|---|---|---|---|---|
| CPU models | ARM 966/xPIC | ARM 966/xPIC
|2* ARM Cortex®-M4 | ARM 926 + MMU/- | ARM 926 + MMU/- | |
| CPU clock | 100 MHz | 100 MHz | 100 MHz | 200 MHz | 200 MHz |
| RAM / ROM | 672kB/64kB | 672kB/64kB
|576kB+64kB/ 96kB | 144kB/32kB | 144kB/32kB | |
| Host Interface Funktions | DPM/SPM/EXT/MEM | DPM/SPM/EXT/MEM
|DPM/SPM | DPM/-/EXT | DPM/-/EXT | |
| MemoryI/F Parallel/Serials | -/SQI XiP | 8, 16, 32 Bit/ SQI XiP
|SQI XiP | 8, 16, 32 Bit/- | 8, 16, 32 Bit/- | |
| xC Channels | 2 | 2
|2 | 3 | 4 | |
| IEEE 1588 Sys Timer/EthernetPHY (10/100 Mbit/s) | 2/Dual-PHY 10/100 | 2/Dual-PHY 10/100
|2/Dual-PHY 10/100 | 1/Dual-PHY 10/100 | 1/Dual-PHY 10/100 | |
| I²S/I²C/SPI/UART | -/2/1/3 | -/2/1/3
| -/2/4/2 | -/1/1/3 | -/1/1/3 | |
| CAN/MAC/LCD | 1/1/- | 1/1/-
|2/-/- | -/-/- | -/-/1 | |
| IO-Link Master Ports | 4 | 8
|8 | - | - | |
| ADC Channels | - | -
|2*2 | 2*4 | 2*4 | |
| USB 1.1 Device/Host | D/- | D/-
|D/- | D/H | D/H | |
| WDC/Timer Counters | 2/10 | 2/10
|4*32-bit / 8*32-bit | 1/5 | 1/5 | |
| MMIO*/GPIO*/PIO | 40/32/62 | 48/32/62
|16/8/49 | 0/16/84 | 0/16/84 | |
| Package Size (mm)/Type (pins) | 15*15/BGA(244) | 19*19/BGA(324)
|10*10/BGA(144) | 22*22/BGA(345) | 22*22/BGA(345) |
= Multiplex Matrix IOs (MMIO) =
The Multiplex Matrix is a set of PINs which could be configured freely with peripheral functions. Options are CAN, UART, SPI, I2C, GPIOs**, PIOs and SYNC Trigger.
= GPIOs =
The GPIOs from Hilscher are able to generate Interrupts, could count level or flags, or could be connected to a timer unit to auto generate a PWM. The Resolution of the PWM is normally 10ns. In some netX ASICS is a dedicated Motion unit with a resolution if 1ns is available.
References
External links
- [https://www.hilscher.com/?cats= Hilscher homepage]
- [https://www.hilscher.com/products/product-groups/network-controller/asics/? ASICS]