IMPLY gate

{{Short description|Digital logic gate}}

{{noref|date=August 2020}}

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|colspan=2|Input
A   B

Output
A → B
{{no2|0}}{{no2|0}}{{yes2|1}}
{{no2|0}}{{yes2|1}}{{yes2|1}}
{{yes2|1}}{{no2|0}}{{no2|0}}
{{yes2|1}}{{yes2|1}}{{yes2|1}}

The IMPLY gate is a digital logic gate that implements a logical conditional.

Symbols

IMPLY can be denoted in algebraic expressions with the logic symbol right-facing arrow (→). Logically, it is equivalent to material implication, and the logical expression ¬A v B.

There are two symbols for IMPLY gates: the traditional symbol and the IEEE symbol. For more information see Logic gate symbols.

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Image:IMPLY ANSI.svg

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|Image:IEC Implies gate.svg

Traditional IMPLY Symbol

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|IEEE IMPLY Symbol

{{Clear}}

Functional completeness

While the Implication gate is not functionally complete by itself, it is in conjunction with the constant 0 source. This can be shown via the following:

\begin{align}

A \rightarrow 0 &:= \neg A \\

(A \rightarrow 0) \rightarrow B &= \neg (\neg A) \lor B \\

&= A \lor B.

\end{align}

Thus as the implication gate with the addition of the constant 0 source can create both the NOT gate and the OR gate, it can create the NOR gate, which is a universal gate.

See also

{{Commons category|IMPLY_gates}}

{{Logical connectives}}

Category:Logic gates

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