Interlaken (networking)
Interlaken is a royalty-free interconnect protocol.
It was invented by Cisco Systems and Cortina Systems in 2006,{{cite news |title= Cisco Systems, Cortina Systems Announce Interlaken Protocol |work= News release |date= April 24, 2006 |publisher= Cisco Systems Inc. |url= http://electronics.ihs.com/news/2006/cisco-cortina-interlaken.htm |accessdate= June 16, 2011 }} optimized for high-bandwidth and reliable packet transfers. It builds on the channelization and per channel flow control features of SPI-4.2, while reducing the number of integrated circuit (chip) I/O pins by using high speed SerDes technology. Bundles of serial links create a logical connection between components with multiple channels, backpressure capability, and data-integrity protection to boost the performance of communications equipment. Interlaken manages speeds of up to 6 Gbit/s per pin (lane) and large numbers of lanes can form an Interlaken interface. It was designed to handle high-speed (10 Gigabit Ethernet, 100 Gigabit Ethernet and beyond) computer network connections.
An alliance was formed in 2007.{{Citation needed|date=May 2023}}
[https://www.xilinx.com/products/intellectual-property/interlaken.html Xilinx] and [https://www.intel.com/content/www/us/en/programmable/solutions/technology/transceiver/protocols/pro-interlaken.html Intel] have both developed FPGAs that have Interlaken hard IP built in.{{Cite web|url=https://www.xilinx.com/products/intellectual-property/interlaken.html|title=UltraScale / UltraScale+ Interlaken|website=www.xilinx.com|access-date=2018-09-13}}{{Cite web|url=https://www.intel.com/content/www/us/en/programmable/solutions/technology/transceiver/protocols/pro-interlaken.html|title=Interlaken / Interlaken Look-Aside|website=www.intel.com|access-date=2018-09-13}}
References
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External links
- [https://web.archive.org/web/20220121224848/https://www.cortina-systems.com/images/documents/400023_Interlaken_Technology_White_Paper.pdf Interlaken White Paper 2007]
- [http://www.altera.com/corporate/news_room/releases/releases_archive/2006/products/nr-interlakenpr.html Altera, Sarance Technologies and Cortina Systems Join Forces on First Interlaken Protocol IP Core for FPGAs]
- [http://edageek.com/2007/01/23/sle-interlaken-ip-core/ SLE Introduces Interlaken Interconnect Protocol IP Core]
- [http://www.open-silicon.com/open-silicon-ips/interlaken-controller-ip/ Open-Silicon Interlaken IP]
- [http://www.eetimes.com/document.asp?doc_id=1270773/ EE Times - Open-Silicon updates 'Interlaken' IP core]
- [https://web.archive.org/web/20150105133156/http://www.open-silicon.com/2011/03/open-silicon-enhances-its-interlaken-ip-core-for-very-high-speed-chip-to-chip-serial-interfaces/ Open-Silicon Enhances its Interlaken IP Core For Very High-Speed Chip-to-Chip Serial Interfaces]
- [https://web.archive.org/web/20150105132408/http://www.open-silicon.com/2011/05/open-silicon-secures-20th-interlaken-ip-license/ Open-Silicon Secures 20th Interlaken IP License]
- [https://web.archive.org/web/20150105132128/http://www.open-silicon.com/2011/12/open-silicons-interlaken-ip-core-chosen-for-alaxalas-advanced-networking-infrastructure-device/ Open-Silicon’s Interlaken IP Core Chosen for ALAXALA’s Advanced Networking Infrastructure Device]
- [https://web.archive.org/web/20150105132829/http://www.open-silicon.com/2012/01/open-silicons-configurable-interlaken-ip-core-delivers-high-performance-chip-to-chip-interface-for-networking-products-at-28nm-process-node/ Open-Silicon’s Configurable Interlaken IP Core Delivers High-Performance Chip to Chip Interface for Networking Products at 28nm Process Node]
- [https://web.archive.org/web/20150105134015/http://www.open-silicon.com/2012/04/open-silicon-unveils-interlaken-ip-core-with-600-gbps-chip-to-chip-interface-support-for-networking-storage-and-high-performance-computing-products/ Open-Silicon Unveils Interlaken IP Core with 600 Gbps Chip-to-Chip Interface Support for Networking, Storage and High-Performance Computing Products]
- [https://web.archive.org/web/20150105132741/http://www.open-silicon.com/2012/07/open-silicons-interlaken-ip-core-selected-for-netronomes-next-generation-flow-processors/ Open-Silicon’s Interlaken IP Core Selected for Netronome’s Next-Generation Flow Processors]
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