List of Intel Itanium processors

{{Multiple issues|{{Overly detailed|date=May 2023}}

{{More citations needed|date=May 2023}}}}

The Itanium from Intel is a high-end server and supercomputer microprocessor.

Itanium (2001)

=Merced (180 nm)=

Steppings: C0, C1 and C2. CPUID: 0007000604h (stepping C0), 0007000704h (stepping C1) or 0007000804h (stepping C2). Transistor count: 25.4 million for CPU, 295 million for the external L3 cache. The FSB data bus is 64 bits wide, not 128 like in Itanium 2.

L2 ! L3
class="wikitable" style="font-size:97%;" ! width="13%" rowspan=2\| Model ! width="14%" rowspan=2\| S-Spec number ! width="8%" rowspan=2\| Clock speed ! width="9%" colspan=2\| Cache ! width="8%" rowspan=2\| FSB speed ! width="6%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP (W) ! width="5%" rowspan=2\| Socket ! width="8%" rowspan=2\| Release date ! width="3%" rowspan=2\| Price
Itanium 733 MHz 2 MB	SL4LT, SL5VS, SL6RH	rowspan=2\|733 MHz	rowspan=4\|96 KB	2 MB	rowspan=4\|266 MT/s	rowspan=4\| 1.25–1.6 V	116	rowspan=4\|PAC418	rowspan=4\|[https://www.intel.com/pressroom/archive/releases/2001/20010529comp.htm 2001-05-29]	$1,177
Itanium 733 MHz 4 MB	SL4LS, SL5VT	4 MB	130	$4,227
Itanium 800 MHz 2 MB	SL4LR, SL5VU, SL6RK	rowspan=2\|800 MHz	2 MB	116	$1,980
Itanium 800 MHz 4 MB	SL4LQ, SL5VW, SL6RL	4 MB	130	$4,227

Itanium 2 (2002-2007)

Itanium 2 uses socket PAC611 with a 128 bit wide FSB. The 90 nm CPUs (9000 and 9100 series) bring dual-core chips and an updated microarchitecture adding multithreading and splitting the L2 cache into a 256 KB data cache and 1 MB instruction cache per core (the pre-9000 series L2 cache being a 256 KB common cache). All Itaniums except some 130 nm models are capable of >2-socket SMP.

=McKinley (180 nm)=

Stepping: B3. Die size: 421 mm². Transistor count: 221 million. CPUID: 001F000704h

L2 ! L3
class="wikitable" style="font-size:97%;" ! width="14%" rowspan=2\| Model{{efn\|The official full names: Intel® Itanium® 2 Processor 900 MHz with 1.5 MB L3 Cache Intel® Itanium® 2 Processor 1.0 GHz with 1.5 MB L3 Cache Intel® Itanium® 2 Processor 1.0 GHz with 3 MB L3 Cache}} ! width="9%" rowspan=2\| S-Spec number ! width="7%" rowspan=2\| Clock speed ! width="10%" colspan=2\| Cache ! width="8%" rowspan=2\| FSB speed ! width="3%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP{{efn\|Intel's originally defined TDP{{cite web \|title=Intel® Itanium® 2 Processor at 1.0 GHz and 900 MHz Datasheet \|url=http://www.intel.com/design/Itanium2/datashts/25094501.pdf \|publisher=Intel \|archive-url=https://web.archive.org/web/20030525142130/http://www.intel.com/design/Itanium2/datashts/25094501.pdf \|archive-date=25 May 2003 \|url-status=dead}} was equal to the maximum socket power, which is 130W{{cite web \|last1=Rusu \|first1=Stefan \|title=Itanium 2 processor 6M: Higher frequency and larger L3 cache \|url=https://www.researchgate.net/figure/Itanium-2-processor-evolution_tbl1_3215383 \|publisher=Intel \|access-date=14 February 2022}}{{cite web \|title=Intel® Itanium® 2 Processor Datasheet \|url=http://download.intel.com/design/Itanium2/datashts/25094505.pdf \|publisher=Table 2-2. Intel \|access-date=24 February 2022 \|archive-url=https://web.archive.org/web/20060621013059/http://download.intel.com/design/Itanium2/datashts/25094505.pdf \|archive-date=21 June 2006 \|url-status=dead}}}} (W) ! width="9%" rowspan=2\| Release date ! width="3%" rowspan=2\| Price
Itanium 2 900 MHz 1.5 MB	SL67W, SL6P6	900 MHz	rowspan=3\|256 KB	rowspan=2\|1.5 MB	rowspan=3\|400 MT/s	rowspan=3\|1.5 V	90	rowspan=3\|[https://www.intel.com/pressroom/archive/releases/2002/20020708comp.htm 2002-07-08]	$1,338
Itanium 2 1.0 GHz 1.5 MB	SL67U, SL6P5	rowspan=2\|1000 MHz	rowspan=2\|100	$2,247
Itanium 2 1.0 GHz 3 MB	SL67V, SL6P7	3 MB	$4,226

=Madison (130 nm)=

Stepping: B1. Die size: 374 mm². Transistor count: 410 million. CPUID: 001F010504h.
The Madison 9M table contains the 4MB and 6MB successors of the first Madisons.

L2 ! L3
class="wikitable" style="font-size:97%;" ! width="15%" rowspan=2\| Model{{efn\|The official full names: Intel® Itanium® 2 Processor 1.3 GHz with 3 MB L3 Cache Intel® Itanium® 2 Processor 1.4 GHz with 4 MB L3 Cache Intel® Itanium® 2 Processor 1.5 GHz with 6 MB L3 Cache Intel® Itanium® 2 Processor 1.4 GHz with 1.5 MB L3 Cache Intel® Itanium® 2 Processor 1.4 GHz with 3 MB L3 Cache Intel® Itanium® 2 Processor 1.6 GHz with 3 MB L3 Cache}} ! width="9%" rowspan=2\| S-Spec number ! width="7%" rowspan=2\| Clock speed ! width="10%" colspan=2\| Cache ! width="8%" rowspan=2\| FSB speed ! width="3%" rowspan=2\| {{Define\|SMP\|Multi-socket capability. DP is 2, MP is >2.}} ! width="3%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP{{efn\|name=fn1\|Maximum socket power is 130W}} (W) ! width="9%" rowspan=2\| Release date ! width="3%" rowspan=2\| Price
Itanium 2 1.3 GHz 3 MB	SL6XD	1300 MHz	rowspan=6\|256 KB	3 MB	rowspan=6\|400 MT/s	rowspan=3\|{{Define\|MP\|More than 2 sockets possible}}	rowspan=6\|1.3 V	97	rowspan=3\|[https://www.intel.com/pressroom/archive/releases/2003/20030630comp.htm 2003-06-30]	$1,338
Itanium 2 1.4 GHz 4 MB	SL6XE	1400 MHz	4 MB	91	$2,247
Itanium 2 1.5 GHz 6 MB	SL6XF	1500 MHz	6 MB	107	$4,226
Itanium 2 1.4 GHz 1.5 MB	SL76K	rowspan=2\|1400 MHz	1.5 MB	rowspan=3\|{{Define\|DP\|1 or 2 sockets only}}	rowspan=2\|91	[https://www.intel.com/pressroom/archive/releases/2003/20030908comp.htm 2003-09-08]	$1,172
Itanium 2 1.4 GHz 3 MB	SL7FP	rowspan=2\|3 MB	rowspan=2\|[https://www.intel.com/pressroom/archive/releases/2004/20040413comp.htm 2004-04-13]	$1,172
Itanium 2 1.6 GHz 3 MB{{efn\|Not to be confused with the Fanwood processor with near-identical specifications.}}	SL7FQ	1600 MHz	99	$2,408

==Deerfield==

The same chip as Madison, but at a lower voltage.

class="wikitable" style="font-size:97%;" ! width="15%" rowspan=2\| Model{{efn\|The official full name: Low Voltage Intel® Itanium® 2 Processor 1.0 GHz with 1.5 MB L3 Cache}} ! width="9%" rowspan=2\| S-Spec number ! width="7%" rowspan=2\| Clock speed ! width="10%" colspan=2\| Cache ! width="8%" rowspan=2\| FSB speed ! width="3%" rowspan=2\| {{Define\|SMP\|Multi-socket capability. DP is 2, MP is >2.}} ! width="3%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP (W) ! width="9%" rowspan=2\| Release date ! width="3%" rowspan=2\| Price
L2 ! L3
{{Define\|LV\|Low Voltage}} Itanium 2 1.0 GHz 1.5 MB	SL754	1000 MHz	256 KB	1.5 MB	400 MT/s	{{Define\|DP\|1 or 2 sockets only}}	1.1 V	55{{efn\|Maximum power is 62W{{cite web \|last1=Muljono \|first1=Harry \|title=New 130nm Itanium®2 Processors for 2003 \|url=https://old.hotchips.org/wp-content/uploads/hc_archives/hc15/3_Tue/13.intel.pdf \|publisher=Intel \|access-date=21 February 2022}}}}	[https://www.intel.com/pressroom/archive/releases/2003/20030908comp.htm 2003-09-08]	$744

class="wikitable" style="font-size:97%;"

! width="15%" rowspan=2| Model{{efn|The official full name:
Low Voltage Intel® Itanium® 2 Processor 1.0 GHz with 1.5 MB L3 Cache}}

! width="9%" rowspan=2| S-Spec number

! width="7%" rowspan=2| Clock speed

! width="10%" colspan=2| Cache

! width="8%" rowspan=2| FSB speed

! width="3%" rowspan=2| {{Define|SMP|Multi-socket capability. DP is 2, MP is >2.}}

! width="3%" rowspan=2| Voltage

! width="5%" rowspan=2| TDP (W)

! width="9%" rowspan=2| Release date

! width="3%" rowspan=2| Price

! L3

{{Define|LV|Low Voltage}} Itanium 2 1.0 GHz 1.5 MB

SL754

1000 MHz

256 KB

1.5 MB

400 MT/s

1.1 V

55{{efn|Maximum power is 62W{{cite web |last1=Muljono |first1=Harry |title=New 130nm Itanium®2 Processors for 2003 |url=https://old.hotchips.org/wp-content/uploads/hc_archives/hc15/3_Tue/13.intel.pdf |publisher=Intel |access-date=21 February 2022}}}}

[https://www.intel.com/pressroom/archive/releases/2003/20030908comp.htm 2003-09-08]

$744

=Madison 9M (130 nm)=

Steppings: A1 and A2. Die size: 432 mm². Transistor count: 592 million. CPUID: 001F020104h (stepping A1) or 001F020204h (stepping A2).
9M is the chip of all the third generation Itanium 2s, irrespective of the amount of enabled cache.{{cite web |title=Intel® Itanium® 2 Processor Reference Manual for Software Development and Optimization |url=http://download.intel.com/design/Itanium2/manuals/25111003.pdf |publisher=page 13. Intel |access-date=24 February 2022 |archive-url=https://web.archive.org/web/20090205013104/http://download.intel.com/design/Itanium2/manuals/25111003.pdf |archive-date=5 February 2009 |url-status=dead}}{{cite web |title=Intel® Itanium® 2 Processor Specification Update |url=http://download.intel.com/design/Itanium2/specupdt/25114140.pdf |publisher=pages 9 and 27-28. Intel |access-date=24 February 2022 |archive-url=https://web.archive.org/web/20060621013136/http://download.intel.com/design/Itanium2/specupdt/25114140.pdf |archive-date=21 June 2006 |url-status=dead}}

L2 ! L3
class="wikitable" style="font-size:97%;" ! width="15%" rowspan=2\| Model{{efn\|The official full names: Intel® Itanium® 2 Processor 1.5 GHz with 4 MB L3 Cache Intel® Itanium® 2 Processor 1.6 GHz with 6 MB L3 Cache Intel® Itanium® 2 Processor 1.6 GHz with 9 MB L3 Cache ... Intel® Itanium® 2 Processor 1.66 GHz with 6 MB L3 Cache Intel® Itanium® 2 Processor 1.66 GHz with 9 MB L3 Cache}} ! width="9%" rowspan=2\| S-Spec number ! width="7%" rowspan=2\| Clock speed ! width="10%" colspan=2\| Cache ! width="8%" rowspan=2\| FSB speed ! width="3%" rowspan=2\| {{Define\|SMP\|Multi-socket capability. DP is 2, MP is >2.}} ! width="3%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP{{efn\|name=fn1}} (W) ! width="9%" rowspan=2\| Release date ! width="4%" rowspan=2\| Price
Itanium 2 1.5 GHz 4 MB	SL7ED, SL8CX	1500 MHz	rowspan=7\|256 KB	4 MB	rowspan=3\|400 MT/s	rowspan=7\|{{Define\|MP\|More than 2 sockets possible}}	rowspan=7\|1.3 V	107	rowspan=3\|[https://www.intel.com/pressroom/archive/releases/2004/20041108comp.htm 2004-11-08]	$910
Itanium 2 1.6 GHz 6 MB	SL7EB, SL8CV	rowspan=4\|1600 MHz	6 MB	rowspan=6\|122	$1,980
Itanium 2 1.6 GHz 9 MB	SL87H, SL8CU	9 MB	$4,226
Itanium 2 1.6 GHz 6 MB	SL93X	6 MB	rowspan=2\|533 MT/s	rowspan=2\|2006-2?{{cite web \|title=Intel® Itanium® 2 Processor Datasheet \|url=http://download.intel.com/design/Itanium2/datashts/25094505.pdf \|publisher=page 8. Intel \|access-date=24 February 2022 \|archive-url=https://web.archive.org/web/20060621013059/http://download.intel.com/design/Itanium2/datashts/25094505.pdf \|archive-date=21 June 2006 \|url-status=dead}}
Itanium 2 1.6 GHz 9 MB	SL93W	9 MB
Itanium 2 1.66 GHz 6 MB	SL8JK	rowspan=2\|1666 MHz	6 MB	rowspan=2\|667 MT/s	rowspan=2\|[https://www.intel.com/pressroom/archive/releases/2005/20050718comp.htm 2005-07-18]	$2194
Itanium 2 1.66 GHz 9 MB	SL8JJ	9 MB	$4,655

==Fanwood==

The same chip as Madison 9M, but restricted to 2-socket and uniprocessor systems.

L2 ! L3
class="wikitable" style="font-size:97%;" ! width="15%" rowspan=2\| Model{{efn\|The official full names: Low Voltage Intel® Itanium® 2 Processor 1.3 GHz with 3 MB L3 Cache Intel® Itanium® 2 Processor 1.6 GHz with 3 MB L3 Cache at 400 MHz System Bus (DP Optimized) Intel® Itanium® 2 Processor 1.0 GHz with 3 MB L3 Cache at 533 MHz System Bus (DP Optimized)}} ! width="9%" rowspan=2\| S-Spec number ! width="7%" rowspan=2\| Clock speed ! width="10%" colspan=2\| Cache ! width="8%" rowspan=2\| FSB speed ! width="3%" rowspan=2\| {{Define\|SMP\|Multi-socket capability. DP is 2, MP is >2.}} ! width="3%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP (W) ! width="9%" rowspan=2\| Release date ! width="4%" rowspan=2\| Price
{{Define\|LV\|Low Voltage}} Itanium 2 1.3 GHz 3 MB	SL7SD, SL8CY	1300 MHz	rowspan=3\|256 KB	rowspan=3\|3 MB	rowspan=2\| 400 MT/s	rowspan=3\|{{Define\|DP\|1 or 2 sockets only}}	62	rowspan=3\|[https://www.intel.com/pressroom/archive/releases/2004/20041108comp.htm 2004-11-08]	$530
Itanium 2 1.6 GHz 3 MB{{efn\|Not to be confused with the Madison processor with near-identical specifications.}}	SL7EC, SL8CW	rowspan=2\|1600 MHz	rowspan=2\|1.3 V	rowspan=2\|99	$851
Itanium 2 1.6 GHz 3 MB	SL7EF, SL8CZ	533 MT/s	$1,172

=HP mx2 MCM (130 nm)=

This multi-chip module codenamed Hondo is not an Intel product, but a separate project of Hewlett-Packard to pack two CPUs onto one PAC611 socket. The S-Spec SL75Z was assigned to the chips that Intel sent to HP for use in mx2.

class="wikitable" style="font-size:97%;" ! width="7%" rowspan=2\| Model ! width="7%" rowspan=2\| Clock speed ! width="20%" colspan=3\| Cache ! width="9%" rowspan=2\| FSB speed ! width="5%" rowspan=2\| {{Define\|SMP\|Multi-socket capability. DP is 2, MP is >2.}} ! width="6%" rowspan=2\| Cores ! width="3%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP (W) ! width="10%" rowspan=2\| Release date
L2 ! L3 ! L4
HP mx2{{cite web\|url=https://www.theregister.co.uk/2004/05/06/hp_mx2_itaniummodule/\|title=HP rides Hondo to super-sized Itanium servers\|author=Ashlee Vance\|author-link=Ashlee Vance\|date=6 May 2004\|website=Theregister.co.uk\|access-date=5 January 2019}}	1100 MHz	2×256 KB	2×4 MB	32 MB	400 MT/s	{{Define\|MP\|More than 2 sockets possible}}	2	1.1 V{{cite web \|title=machinfo output interpretation on rx4640 \|url=https://community.hpe.com/t5/Integrity-Servers/machinfo-output-interpretation-on-rx4640/td-p/4496140 \|website=Hewlett Packard Enterprise Community \|access-date=30 April 2022}}	170{{cite web \|last1=Haff \|first1=Gordon \|title=HP Doubles Up on Madison \|url=http://h71028.www7.hp.com/ERC/downloads/mx2_white_paper.pdf \|quote="the power envelope of a standard Madison—170 watts in all, 130 watts for the processor and 40 watts for its voltage regulator" \|archive-url=https://web.archive.org/web/20060506094308/http://h71028.www7.hp.com/ERC/downloads/mx2_white_paper.pdf \|archive-date=6 May 2006 \|url-status=dead}}	2004-06{{refn\|[https://web.archive.org/web/20040507162548/http://www.hp.com:80/hpinfo/newsroom/press/2004/040505b.html Announced 2004-05-05], but available in June.{{cite web \|last1=McMillan \|first1=Robert \|title=HP to release dual-processor Itanium module \|url=https://www.computerworld.com/article/2564506/hp-to-release-dual-processor-itanium-module.html \|website=Computerworld \|date=5 May 2004 \|access-date=19 April 2022}}}}

class="wikitable" style="font-size:97%;"

! width="7%" rowspan=2| Model

! width="7%" rowspan=2| Clock speed

! width="20%" colspan=3| Cache

! width="9%" rowspan=2| FSB speed

! width="5%" rowspan=2| {{Define|SMP|Multi-socket capability. DP is 2, MP is >2.}}

! width="6%" rowspan=2| Cores

! width="3%" rowspan=2| Voltage

! width="5%" rowspan=2| TDP (W)

! width="10%" rowspan=2| Release date

! L3

! L4

HP mx2{{cite web|url=https://www.theregister.co.uk/2004/05/06/hp_mx2_itaniummodule/|title=HP rides Hondo to super-sized Itanium servers|author=Ashlee Vance|author-link=Ashlee Vance|date=6 May 2004|website=Theregister.co.uk|access-date=5 January 2019}}

1100 MHz

2×256 KB

2×4 MB

32 MB

400 MT/s

1.1 V{{cite web |title=machinfo output interpretation on rx4640 |url=https://community.hpe.com/t5/Integrity-Servers/machinfo-output-interpretation-on-rx4640/td-p/4496140 |website=Hewlett Packard Enterprise Community |access-date=30 April 2022}}

170{{cite web |last1=Haff |first1=Gordon |title=HP Doubles Up on Madison |url=http://h71028.www7.hp.com/ERC/downloads/mx2_white_paper.pdf |quote="the power envelope of a standard Madison—170 watts in all, 130 watts for the processor and 40 watts for its voltage regulator" |archive-url=https://web.archive.org/web/20060506094308/http://h71028.www7.hp.com/ERC/downloads/mx2_white_paper.pdf |archive-date=6 May 2006 |url-status=dead}}

2004-06{{refn|[https://web.archive.org/web/20040507162548/http://www.hp.com:80/hpinfo/newsroom/press/2004/040505b.html Announced 2004-05-05], but available in June.{{cite web |last1=McMillan |first1=Robert |title=HP to release dual-processor Itanium module |url=https://www.computerworld.com/article/2564506/hp-to-release-dual-processor-itanium-module.html |website=Computerworld |date=5 May 2004 |access-date=19 April 2022}}}}

=Montecito (90 nm)=

Steppings: C1 and C2. Die size: 596 mm². Transistor count: 1720 million. CPUID: 0020000504h (stepping C1) or 0020000704h (stepping C2).
All processors can support the legacy 400 MT/s FSB.{{cite web |title=Dual-Core Intel® Itanium® 2 Processor 9000 Series |url=http://download.intel.com/products/processor/itanium2/dc_prod_brief.pdf |publisher=Intel |access-date=24 February 2022 |archive-url=https://web.archive.org/web/20060822120955/http://download.intel.com/products/processor/itanium2/dc_prod_brief.pdf |archive-date=22 August 2006 |url-status=dead}} From Montecito onwards all Itaniums are MP-capable.

L2 ! L3
class="wikitable" style="font-size:97%;" ! width="12%" rowspan=2\| Model number ! width="7%" rowspan=2\| Clock speed ! width="14%" colspan=2\| Cache ! width="7%" rowspan=2\| FSB speed ! width="5%" rowspan=2\| Multiplier ! width="5%" rowspan=2\| Cores ! width="6%" rowspan=2\| Threads per core ! width="10%" rowspan=2\| Voltage ! width="7%" rowspan=2\| TDP (W) ! width="7%" rowspan=2\| Socket ! width="10%" rowspan=2\| Release date ! width="4%" rowspan=2\| Price (USD)
Itanium 2 9010	1.6 GHz	rowspan=6\|256 KB {{Define\|D\|data}} + 1 MB {{Define\|I\|instructions}}	6 MB	533 MHz	12×	1	1	rowspan=6\|1.0875–1.25 V	75 W	rowspan=6\|PPGA611	rowspan=6\|[https://www.intel.com/pressroom/archive/releases/2006/20060718comp.htm 2006-07-18]	$696
Itanium 2 9015	1.4 GHz	2×6 MB	400 MHz	14×	rowspan=5\|2	rowspan=2\|2	rowspan=5\|104 W	$749
Itanium 2 9020	1.42 GHz	2×6 MB	rowspan=4\|533 MHz	10.5×	$910
Itanium 2 9030	rowspan="3" \|1.6 GHz	2×4 MB	rowspan=3\|12×	1	$1552
Itanium 2 9040	2×9 MB	rowspan=2\|2	$1980
Itanium 2 9050	2×12 MB	$3692

=Montvale (90 nm)=

The chip is similar to Montecito, but the stepping is A1 and the CPUID is 0020010104h. The models with 533 MT/s FSB also support 400 MT/s FSB operation.{{cite web |title=Product Brief Intel® Itanium® Processor 9100 Series |url=http://download.intel.com/products/processor/itanium/dc_prod_brief.pdf |publisher=Intel |archive-url=https://web.archive.org/web/20081207175521/http://download.intel.com/products/processor/itanium/dc_prod_brief.pdf |archive-date=7 December 2008 |url-status=dead}} The processors with the Core level Lock-Step error correction feature were released only in 2008.{{cite web |title=Intel Unveils Seven New Intel® Itanium® Processors |url=https://www.intel.com/pressroom/archive/releases/2007/20071031comp.htm |publisher=Intel |access-date=24 February 2022}} Even though Intel does not use the "Itanium 2" branding for the 9100-series, it's still grouped with Itanium 2 processors because it uses the same platform and is a minor update on the 9000-series.

L2 ! L3
class="wikitable" style="font-size:97%;" ! width="12%" rowspan=2\| Model number ! width="7%" rowspan=2\| Clock speed ! width="14%" colspan=2\| Cache ! width="7%" rowspan=2\| FSB speed ! width="5%" rowspan=2\| Multiplier ! width="5%" rowspan=2\| Cores ! width="6%" rowspan=2\| Threads per core ! width="10%" rowspan=2\| Voltage ! width="7%" rowspan=2\| TDP (W) ! width="7%" rowspan=2\| Socket ! width="10%" rowspan=2\| Release date ! width="4%" rowspan=2\| Price (USD)
Itanium 9110N	1.6 GHz	rowspan=8\|256 KB {{Define\|D\|data}} + 1 MB {{Define\|I\|instructions}}	12 MB	533 MHz	12×	1	1	rowspan=8\|1.0875–1.25 V	75 W	rowspan=8\|PPGA611	rowspan=7\|[https://www.intel.com/pressroom/archive/releases/2007/20071031comp.htm 2007-10-31]	$696
Itanium 9120N	1.42 GHz	2×6 MB	533 MHz	10.5×	rowspan=7\|2	2	rowspan=7\|104 W	$910
Itanium 9130M	1.66 GHz	2×4 MB	667 MHz	10×	1	$1552
Itanium 9140N	1.6 GHz	2×9 MB	533 MHz	12×	rowspan=5\|2	$1980
Itanium 9140M	1.66 GHz	2×9 MB	667 MHz	10×	$1980
Itanium 9150N	1.6 GHz	2×12 MB	533 MHz	12×	$3692
Itanium 9150M	1.66 GHz	2×12 MB	667 MHz	10×	$3692
Itanium 9152M	1.66 GHz	2×12 MB	667 MHz	10×

Itanium (2007–2019)

These later generations of Itanium use socket LGA 1248, the QuickPath Interconnect and Scalable Memory Interconnect having replaced the Front-Side Bus used by Itanium 2.

=Tukwila (65 nm)=

Stepping: E0. Die size: 699 mm². Transistor count: 2046 million. CPUID: 0020020404.
All models support: XD bit (an NX bit implementation), Hyper-threading, Turbo Boost, VT-i2 (Itanium Virtualization technology), Intel VT-d, RAS with Advanced Machine Check Architecture, Cache Safe technology, Enhanced Demand Based Switching, ECC, two memory controllers each with two SMI links to memory buffers for DDR3, for a combined memory bandwidth of 34 GB/s and capacity of 256 GB. The QPI bandwidth is 96 GB/s for cache coherency and 24 GB/s for I/O.

Clock speed ! Turbo Boost ! L2 ! L3
class="wikitable" style="font-size:97%;" ! width="12%" rowspan=2\| Model number ! width="14%" colspan=2\| Clock speed ! width="17%" colspan=2\| Cache ! width="5%" rowspan=2\| QuickPath ! width="5%" rowspan=2\| Cores ! width="7%" rowspan=2\| Threads per core ! width="9%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP (W) ! width="8%" rowspan=2\| Socket ! width="10%" rowspan=2\| Release date ! width="4%" rowspan=2\| Price (USD)
Itanium 9310	1.60 GHz	{{n/a}}	rowspan=5\|256 KiB {{Define\|D\|data}} + 512 KiB {{Define\|I\|instructions}}	2×5 MiB	rowspan="5" \|4.8 GT/s	2	rowspan=5\|2	rowspan=5\|0.8–1.35 V	130W	rowspan="5" \|LGA1248	rowspan="5" \|2010-02-08	$946
Itanium 9320	1.33 GHz	1.46 GHz	4×4 MiB	rowspan=4\|4	rowspan=2\|155W	$1614
Itanium 9330	1.46 GHz	1.60 GHz	rowspan=2\|4×5 MiB	$2059
Itanium 9340	1.60 GHz	1.73 GHz	rowspan=2\|185W	$2059
Itanium 9350	1.73 GHz	1.86 GHz	4×6 MiB	$3838

=Poulson (32 nm)=

Stepping: D0. Die size: 544 mm². Transistor count: 3.1 billion. CPUID: 0021000404.
All models support: Itanium New Instructions,{{cite web|url=http://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/itanium-9500-brief.pdf|title=Intel® Itanium® Processor 9500 Series|website=Intel.com|access-date=5 January 2019}} XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, VT-i3 (Itanium Virtualization technology), Hyper-threading (with Dual-Domain Multithreading), Turbo Boost, Enhanced Intel SpeedStep Technology (EIST), Cache-Safe technology, RAS with Advanced Machine Check Architecture, Instruction Replay technology, ECC, two memory controllers each with two SMI links to memory buffers for DDR3, for a combined memory bandwidth of 45 GB/s and capacity of 512 GB. The QPI bandwidth is 128 GB/s for cache coherency and 32 GB/s for I/O.

Clock Speed ! Clock Speed\|Turbo-boost ! L2 ! L3
class="wikitable" style="font-size:97%;" ! width="12%" rowspan=2\| Model number ! width="14%" colspan=2\| Clock speed ! width="17%" colspan=2\| Cache ! width="5%" rowspan=2\| QuickPath ! width="5%" rowspan=2\| Cores ! width="7%" rowspan=2\| Threads per core ! width="9%" rowspan=2\| Voltage ! width="5%" rowspan=2\| TDP (W) ! width="8%" rowspan=2\| Socket ! width="10%" rowspan=2\| Release date ! width="4%" rowspan=2\| Price (USD)
Itanium 9520	1.73 GHz	rowspan=4\|256 KiB {{Define\|D\|data}} + 512 KiB {{Define\|I\|instructions}}	20 MiB	rowspan="4" \|6.4 GT/s	4	rowspan=4\|2	rowspan=4\|0.85-1.2 V	130W	rowspan="4" \|LGA1248	rowspan="4" \|2012-11-08	$1350
Itanium 9540	2.13 GHz	24 MiB	8	rowspan=3\|170W	$2650
Itanium 9550	2.4 GHz	rowspan=2\|32 MiB	4	$3750
Itanium 9560	2.53 GHz	8	$4650

= Kittson (32 nm) =

The 9700 series, despite nominally having a different stepping (E0 with CPUID 0021000504), is functionally identical with the 9500 series, even having exactly the same bugs, the only difference being the 133 MHz higher frequency of 9760 and 9750 over 9560 and 9550 respectively.{{cite web |title=Intel® Itanium® Processor 9300, 9500 and 9700 Series Specification Update |url=https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/9300-9500-9700-series-spec-update.pdf |publisher=Intel |archive-url=https://web.archive.org/web/20201111234308/https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/9300-9500-9700-series-spec-update.pdf |archive-date=11 November 2020 |url-status=dead}} Intel had committed to at least one more generation after Poulson, first mentioning Kittson on 14 June 2007.{{cite web |last1=Boslet |first1=Mark |title=Intel to employ advanced technology on server chips |url=https://www.mercurynews.com/2007/06/14/intel-to-employ-advanced-technology-on-server-chips/ |website=The Mercury News |date=15 June 2007 |access-date=26 February 2022}} Kittson was supposed to be on a 22 nm process and use the same LGA2011 socket and platform as Xeons.{{cite web |last1=Wheeler |first1=Bob |title=Tocking Itanium |url=https://www.linleygroup.com/newsletters/newsletter_detail.php?num=4912 |publisher=The Linley Group |access-date=26 February 2022}}{{cite web |last1=Skaugen |first1=Kirk |title=IDF2011 Intel Developer Forum |url=https://download.intel.com/newsroom/kits/idf/2011_fall/pdfs/Kirk_Skaugen_DCSG_MegaBriefing.pdf |publisher=slide 21. Intel |access-date=26 February 2022}}{{cite web |last1=Nist |first1=Pauline |title=More than just another Itanium chip |url=https://itpeernetwork.intel.com/more-than-just-another-itanium-chip/#gs.r3sxvd |publisher=Intel |access-date=26 February 2022 |archive-url=https://web.archive.org/web/20200808053527/https://itpeernetwork.intel.com/more-than-just-another-itanium-chip/#gs.r3sxvd |archive-date=8 August 2020 |url-status=dead}} On 31 January 2013 Intel issued an update to their plans for Kittson: it would have the same LGA1248 socket and 32 nm process as Poulson, effectively halting any further development of Itanium processors.{{cite web |title=Intel® Itanium® Processors Update |url=http://www.intel.com/content/www/us/en/processors/itanium/itanium-kittson-update.html |archive-url=https://web.archive.org/web/20161109135111/http://www.intel.com/content/www/us/en/processors/itanium/itanium-kittson-update.html |archive-date=9 November 2016 |url-status=dead}}

Clock Speed ! Clock Speed \|Turbo-boost ! L2 ! L3
class="wikitable" style="font-size:97%;" ! rowspan="2" width="12%" \| Model number ! colspan="2" width="14%" \| Clock speed ! colspan="2" width="17%" \| Cache ! rowspan="2" width="5%" \| QuickPath ! rowspan="2" width="5%" \| Cores ! rowspan="2" width="7%" \| Threads per core ! rowspan="2" width="9%" \| Voltage ! rowspan="2" width="5%" \| TDP (W) ! rowspan="2" width="8%" \| Socket ! rowspan="2" width="10%" \| Release date ! rowspan="2" width="4%" \| Price (USD)
Itanium 9720	1.73 GHz	rowspan=4\|256 KiB {{Define\|D\|data}} + 512 KiB {{Define\|I\|instructions}}	20 MiB	rowspan="4" \|6.4 GT/s	4	rowspan=4\|2	rowspan=4\|0.85-1.2 V	130W	rowspan="4" \|LGA1248	rowspan="4" \|2017-05-11	$1350
Itanium 9740	2.13 GHz	24 MiB	8	rowspan=3\|170W	$2650
Itanium 9750	2.53 GHz	rowspan=2\|32 MiB	4	$3750
Itanium 9760	2.66 GHz	8	$4650

References

*Itanium

Intel Itanium

Category:Very long instruction word computing