Management Component Transport Protocol

{{Short description|Low-level protocol used for controlling hardware components}}

{{Use mdy dates|date=August 2014}}

Management Component Transport Protocol (MCTP) is a protocol designed by the Distributed Management Task Force (DMTF) to support communications between different intelligent hardware components that make up a platform management subsystem, providing monitoring and control functions inside a managed computer system. This protocol is independent of the underlying physical bus properties, as well as the data link layer messaging used on the bus. The MCTP communication model includes a message format, transport description, message exchange patterns, and operational endpoint characteristics.{{cite web

| url = http://www.mandevcon.com/2007/presentations/ts_mctp.pdf

| archiveurl = https://web.archive.org/web/20131109224220/http://www.mandevcon.com/2007/presentations/ts_mctp.pdf

| title = Management Component Transport Protocol (MCTP)

| year = 2007 | accessdate = November 9, 2013

| archivedate = November 9, 2013

| author = Tom Slaight | publisher = Intel

}}{{cite web

| url = https://www.networkworld.com/article/2189458/mctp--this-protocol-is-a-key-tool-in-server-management-to-maximize-roi.html

| title = MCTP: This protocol is a key tool in server management to maximize ROI

| date = June 18, 2012 | accessdate = November 9, 2013

| author = Amar Kapadia | website = networkworld.com

}}

MCTP allows the transmission of a wide variety of management commands over alternative types of links. Simplified nature of the protocol and reduced encapsulation overheads make MCTP suitable for implementation and processing within system firmware and integrated baseboard management controllers (BMCs), on a wide range of platforms{{snd}} including servers, workstations and embedded devices.{{cite web

| url = http://www.pcisig.com/developers/main/training_materials/get_document?doc_id=0e7ddff785dd0eeb16482dacdaddc0bab5e61170

| archiveurl = https://web.archive.org/web/20131109225411/http://www.pcisig.com/developers/main/training_materials/get_document?doc_id=0e7ddff785dd0eeb16482dacdaddc0bab5e61170

| title = MCTP over PCIe Implementation

| year = 2013 | accessdate = November 9, 2013

| archivedate = November 9, 2013

| author = Eliel Louzoun | publisher = PCI-SIG

| format = PDF

}}{{cite web

| url = http://www.dmtf.org/sites/default/files/standards/documents/DSP0253_1.0.0.pdf

| title = Management Component Transport Protocol (MCTP) Serial Transport Binding

| date = July 21, 2010 | accessdate = February 26, 2014

| publisher = DMTF }} The following table describes which protocols MCTP can encapsulate, and what kind of protocols MCTP can be run over:

class=wikitable |+MCTP protocol support{{cite web |title=PMCI {{!}} DMTF |url=https://www.dmtf.org/standards/pmci |website=www.dmtf.org}} (list of standards)
Protocol	Can encapsulate	Can transmit over
PCI Express | {{yes|MI}} || {{yes|VDM}}
NVM Express | {{yes|Management Messages}} || {{no}}
CXL (Fabric Manager, Type 3 DCCI) | {{yes}} || {{no}}
Platform Level Data Model | {{yes}} || {{no}}
NC-SI, Ethernet | {{yes}} || {{no}}
USB | {{no}} || {{yes}}
I2C/SMBus, I3C (incl. PCIe) | {{no}} || {{yes}}
Serial Port | {{no}} || {{yes}}
ACPI PCC | {{no}} || {{yes}}
UCIe | {{no}} || {{yes}}
{{abbr|KCS|Keyboard Controller Style}} | {{no}} || {{yes}}
{{abbr|MMBI|Memory-Mapped Buffer Interface}} (incl. PCIe) | {{no}} || {{yes}}

For example, Intel's network interface controllers (NICs) include support for MCTP over PCI Express and SMBus since 2012, allowing these NICs to be controlled and monitored at a low level over MCTP. Exposed configuration and monitoring operations include power management, control of Address Resolution Protocol (ARP) offloading, configuration of the out-of-band management traffic (which can be separated from the Ethernet traffic visible to the operating system by using RMCP ports filtering, a separate MAC address, or through VLAN tagging), and handling of NIC's interrupts and error conditions.{{cite web

| url = http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/i210-ethernet-controller-datasheet.pdf

| title = Intel Ethernet Controller I210 Datasheet

| year = 2013 | accessdate = November 9, 2013

| publisher = Intel | pages = 1, 15, 52, 621–776

}}{{cite web

| url = http://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/ethernet-x540-brief.pdf

| title = Intel Ethernet Controller X540 Product Brief

| year = 2012 | accessdate = February 26, 2014

| publisher = Intel }}

DMTF also defines the Management Controller Host Interface (MCHI), which includes a set of discovery options and registration commands, allowing UEFI, BIOS or the operating system to communicate with a MCTP-enabled BMC. Discovery options include PCI/PCI Express class codes as part of the PCI configuration space, MCHI Description Table and control methods defined and exported via ACPI, and data structures exported via SMBIOS.{{cite web

| url = http://www.dmtf.org/sites/default/files/standards/documents/DSP0256_1.0.0.pdf

| title = Management Component Transport Protocol (MCTP) Host Interface Specification

| date = July 21, 2010 | accessdate = February 26, 2014

| publisher = DMTF }}