Mukta Farooq

{{Short description|Indian metallurgical engineer}}

{{Use dmy dates|date=February 2023}}

{{Use Indian English|date=February 2023}}

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Mukta Ghate Farooq is an Indian metallurgical engineer of Marathi descent working for the IBM Corporation in Hopewell Junction, New York. She was named a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2016{{Cite web|url=https://www.ieee.org/membership_services/membership/fellows/2016_elevated_fellows.pdf|archive-url=https://web.archive.org/web/20151223105649/http://www.ieee.org/membership_services/membership/fellows/2016_elevated_fellows.pdf|url-status=dead|archive-date=23 December 2015|title=2016 elevated fellow|website=IEEE Fellows Directory}} for her contributions to 3D integration and interconnect technology. She is currently a Distinguished Research Staff Member at IBM Research and has over 220 issued US patents including patent numbers 10199315, 20180061749, and 8367543.[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&r=0&f=S&l=50&d=PTXT&RS=%28APT%2F1+AND+IN%2Ffarooq-mukta%24%29&Refine=Refine+Search&Query=apt%2F1+and+in%2Ffarooq-mukta%24 US Patents of Mukta Farooq]{{Cite web|url=https://patents.justia.com/inventor/mukta-ghate-farooq|title=Mukta Ghate Farooq Inventions, Patents and Patent Applications - Justia Patents Search|website=patents.justia.com|access-date=2019-03-30}} In 2017, IIT Bombay awarded her the notable alumna award{{Cite web|url=https://skilloutlook.com/education/iit-bombay-58th-foundation-day-honours-11-distinguished-alumnus-awards-2-young-alumnus-achievers-awards|title=IIT Bombay 58th Foundation Day: Honours 11 as Distinguished Alumnus Awards, 2 as Young Alumnus Achievers Awards|date=11 March 2017}}

Education

Muktha received her B.Tech. degree in Metallurgical Engineering from [https://wikipedia.org/wiki/Indian_Institute_of_Technology_Bombay IIT Bombay] in 1983. Farooq got her master's degree from Northwestern University in Materials Science in 1985 and got her Ph.D. in Materials Science from Rensselaer Polytechnic Institute in 1988.{{Cite web|url=http://www.iitb.ac.in/alumni/en/awards/2017/distinguished-alumnus/dr-mukta-ghate-farooq|title=Dr. Mukta Ghate Farooq {{!}} Alumni and Corporate Relations|website=www.iitb.ac.in|access-date=2019-03-30}}

Distinctions

Dr. Mukta Ghate Farooq was recognized for numerous achievements throughout her educational career, including the Gold Medal Award for undergraduate achievements from the Indian Institute of Foundry (1982), the Dorab Tata Scholarship award (1983), the J.N. Tata Endowment Scholarship (1983), and the IBM Fellowship Award for doctoral studies (1986 - 1988). In 1988, she was nominated to Alpha Sigma Mu, a professional honor society affiliated with ASM International.{{Cite web|title=Dr. Mukta Ghate Farooq {{!}} Alumni and Corporate Relations|url=https://www.alumni.iitb.ac.in/en/awards/2017/distinguished-alumnus/dr-mukta-ghate-farooq|access-date=2021-01-20|website=www.alumni.iitb.ac.in}}

In her professional career, Farooq received the Best Paper Award at the IMAPS International Conference (2006), the Technology All Star Award from National Women of Color in STEM (2008),{{Cite web|title=Plenary & Invited Speakers {{!}} PROGRAM|url=https://ewh.ieee.org/conf/edtm/2018/program/abstract/Farooq_G_Mukta.html|access-date=2021-01-20|website=IEEE}} and was designated an IEEE EDS Distinguished Lecturer in 2012. In 2014, she became an IBM Lifetime Master Inventor and was appointed to the IBM Academy of Technology. She also received the Outstanding Technical Achievement Award for 3D Technology Integration in 2015.

In 2016, Dr. Farooq was named a Fellow of the Institute of Electrical and Electronics Engineers (IEEE). Shortly thereafter, in 2017, she was awarded Bombay's Distinguished Alumnus/Alumna Award from her undergraduate institution, the Indian Institute of Technology Bombay. In 2016, she was named a GLOBALFOUNDRIES Fellow.{{Cite web|title=What It Takes to be a Patent Leader {{!}} GLOBALFOUNDRIES|url=https://www.globalfoundries.com/blog/what-it-takes-be-patent-leader|access-date=2021-01-20|website=www.globalfoundries.com|date=3 May 2017 |language=en}}

Works

As of 2022, Farooq was the author of 227 granted U.S. patents, earning her a place on the List of Prolific Inventors. She has also authored a number of lectures, conference papers, and journal articles on subjects including heterogeneous integration for artificial intelligence,{{Cite news|last=Farooq|first=Mukta|date=2020|title=Enabling AI with heterogeneous integration|work=Chip Scale Review|url=https://www.chipscalereview.com/blog/Enabling-AI-with-heterogeneous-integration|access-date=2021-01-19}} 3D TSV integration{{Cite book|last1=Farooq|first1=M. G.|last2=Graves-Abe|first2=T. L.|last3=Landers|first3=W. F.|last4=Kothandaraman|first4=C.|last5=Himmel|first5=B. A.|last6=Andry|first6=P. S.|last7=Tsang|first7=C. K.|last8=Sprogis|first8=E.|last9=Volant|first9=R. P.|title=2011 International Electron Devices Meeting |chapter=3D copper TSV integration, testing and reliability |date=December 2011|pages=7.1.1–7.1.4|doi=10.1109/IEDM.2011.6131504|isbn=978-1-4577-0505-2|s2cid=42496282}}{{Cite journal|last1=Farooq|first1=Mukta G.|last2=Iyer|first2=Subramanian S.|date=2011-05-05|title=3D integration review|journal=Science China Information Sciences|volume=54|issue=5|pages=1012|doi=10.1007/s11432-011-4226-7|issn=1869-1919|doi-access=}} and Pb-free ceramic ball grid array (CBGA) assemblies.{{Cite book|last1=Farooq|first1=M.|last2=Goldmann|first2=L.|last3=Martin|first3=G.|last4=Goldsmith|first4=C.|last5=Bergeron|first5=C.|title=53rd Electronic Components and Technology Conference, 2003. Proceedings. |chapter=Thermo-mechanical fatigue reliability of Pb-free ceramic ball grid arrays: Experimental data and lifetime prediction modeling |date=2003|chapter-url=https://ieeexplore.ieee.org/document/1216385|location=New Orleans, Louisiana, USA|publisher=IEEE|pages=827–833|doi=10.1109/ECTC.2003.1216385|isbn=978-0-7803-7791-2|s2cid=110096776}}{{Cite book|last1=Interrante|first1=M.|last2=Coffin|first2=J.|last3=Cole|first3=M.|last4=De Sousa|first4=I.|last5=Farooq|first5=M.|last6=Goldmann|first6=L.|last7=Goldsmith|first7=C.|last8=Jozwiak|first8=J.|last9=Lopez|first9=T.|last10=Martin|first10=G.|last11=Van Thanh Troung|title=IEEE/CPMT/SEMI 28th International Electronics Manufacturing Technology Symposium, 2003. IEMT 2003 |chapter=Lead-free package interconnections for ceramic grid arrays |date=2003|chapter-url=https://ieeexplore.ieee.org/document/1225883|location=San Jose, CA, USA|publisher=IEEE|pages=85–92|doi=10.1109/IEMT.2003.1225883|isbn=978-0-7803-7933-6|s2cid=108495051}}

References