OR-AND-invert

OR-AND-invert gates implement the inverted product of sums. $n$ groups of $m\_i$, $m\_i\; \backslash ge\; 1,\; i=1\backslash ldots\; n$ input signals combined with OR, and the results then combined with NAND.

File:2-1-OAI.svg

A 2-1-OAI gate realizes the following function:

: $Y\; =\; \backslash overline\{(A\; \backslash lor\; B)\; \backslash land\; C\}$

A 2-2-OAI gate realizes the following function:

: $Y\; =\; \backslash overline\{(A\; \backslash lor\; B)\; \backslash land\; (C\; \backslash lor\; D)\}$

File:3-1-OAI.svg

OAI-gates can efficiently be implemented as complex gates. An example of a 3-1 OAI-gate is shown in the figure below.{{Cite web |url=https://tams.informatik.uni-hamburg.de/applets/hades/webdemos/05-switched/40-cmos/oai31.html |title=CMOS OAI31 or-and-invert complex gate |access-date=2024-02-12 |last=Hendrichs |first=Norman |publisher=University of Hamburg}}

One possibility of implementing an XOR gate is by using a 2-2-OAI-gate with non-inverted and inverted inputs. {{Cite web |url=https://sus.ziti.uni-heidelberg.de/Lehre/WS1617_DST/DST_Fischer_03_Logik_Gatter.pptx.pdf |title=Aussagenlogik und Gatter |access-date=2024-01-21 |last=Fischer |first=P. |publisher=University of Heidelberg}}

File:XOR gate based on 2-2 AOI gate.svg

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Category:Logic gates