Pulse transition detector
{{short description|Flip-flop logic gate}}
{{Unreferenced|date=December 2009}}
A pulse transition detector is used in flip flops in order to achieve edge triggering in the circuit. It merely converts the clock signal's rising edge to a very narrow pulse.
The PTD consists of a delay gate (which delays the clock signal) and the clock signal itself passed through a NAND gate and then inverted.
The benefit of edge triggering is that it removes the problems of zeroes and ones catching associated with pulse triggered flip-flops (e.g. master slave flip flops).
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