SHA instruction set
{{short description|Extensions to the x86 instruction set architecture}}
A SHA instruction set is a set of extensions to the x86 and ARM instruction set architecture which support hardware acceleration of Secure Hash Algorithm (SHA) family. It was specified in 2013 by Intel.{{Cite web|title=New Instructions Supporting the Secure Hash Algorithm on Intel® Architecture Processors|url=https://software.intel.com/en-us/articles/intel-sha-extensions|access-date=2024-07-25|website=intel.com|language=en}} Instructions for SHA-512 was introduced in Arrow Lake and Lunar Lake in 2024.
x86 architecture processors
The original SSE-based extensions added four instructions supporting SHA-1 and three for SHA-256.
- SHA-1:
SHA1RNDS4,SHA1NEXTE,SHA1MSG1,SHA1MSG2 - SHA-256:
SHA256RNDS2,SHA256MSG1,SHA256MSG2
The newer SHA-512 instruction set comprises AVX-based versions of the original SHA instruction set marked with a V prefix and these three new AVX-based instructions for SHA-512:
VSHA512RNDS2,VSHA512MSG1,VSHA512MSG2
= AMD =
All recent AMD processors support the original SHA instruction set:
= Intel =
The following Intel processors support the original SHA instruction set:
- Intel Goldmont{{Cite web|title=Goldmont - Microarchitectures - Intel - WikiChip|url=https://en.wikichip.org/wiki/intel/microarchitectures/goldmont#New_instructions|access-date=2024-07-25|website=en.wikichip.org|language=en}} (2016) and later Atom microarchitecture processors.
- Intel Cannon Lake{{Cite web|title=Cannon Lake - Microarchitectures - Intel - WikiChip|url=https://en.wikichip.org/wiki/intel/microarchitectures/cannon_lake#New_instructions|access-date=2024-07-25|website=en.wikichip.org|language=en}} (2018/2019), Ice Lake{{Cite web|title=Ice Lake (client) - Microarchitectures - Intel - WikiChip|url=https://en.wikichip.org/wiki/intel/microarchitectures/ice_lake_(client)#New_instructions|access-date=2024-07-25|website=en.wikichip.org|language=en}} (2019) and later processors for laptops ("mainstream mobile").
- Intel Rocket Lake (2021) and later processors for desktop computers.
The following Intel processors will support the newer SHA-512 instruction set:
- Intel Arrow Lake and Lunar Lake processors.
References
{{Reflist}}
External links
- Chapter 8 of {{cite web|url=http://download-software.intel.com/sites/default/files/319433-015.pdf|title=Intel Architecture Instruction Set Extensions Programming Reference|archive-url=https://web.archive.org/web/20130929035331/http://download-software.intel.com/sites/default/files/319433-015.pdf|archive-date=2013-09-29}}
{{AMD}}
{{Intel}}
{{Multimedia extensions}}
Category:Hardware acceleration
{{microcompu-stub}}