ULTRAY2000

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ULTRAY2000 is a concept chip for 3D graphics processing designed by Digital Media Professionals Inc. (DMP), a Japanese GPU design company. It was used for real-time 3D graphics.{{cite web|url=http://www.dmprof.com/en/en_product_visualprocessor.html|title=Press Release: ULTRAY2000 announcement|date=July 21, 2005|publisher=Digital Media Professionals Inc. (DMP)}}{{dead link|date=November 2023}} It was produced in 0.13 μm TSMC manufacturing process and contained more than 100 million CMOS transistors, with GPU core clock running at 200 MHz and its integrated memory controller having support for DDR-400 memory. DMP announced ULTRAY2000 concept chip on July 21, 2005, and its first exhibition was at SIGGRAPH 2005. The first sample shipments were scheduled for the fall of 2005. ULTRAY2000 adopted a design where a fixed graphics pipeline architecture coexists with an advanced instruction programmable core.{{cite web|url=http://journal.mycom.co.jp/photo/articles/2005/08/16/siggraph2/images/006l.jpg|archive-url=https://web.archive.org/web/20110721174053/http://journal.mycom.co.jp/photo/articles/2005/08/16/siggraph2/images/006l.jpg|url-status=dead|archive-date=July 21, 2011|title=ULTRAY2000 block diagram|date=August 16, 2005|publisher=journal.mycom.co.jp}}

ULTRAY2000 features proprietary modelled algorithms for generating physical light reflection and shadow properties for various materials embedded on the visual processor chip as hardware specific features (“MAESTRO” technology). This feature gave the chip ability to process real-life looking 3D graphics at high resolution in real time.

It was succeeded by the PICA200.

Specification

SIGGRAPH 2005's public exhibition card:{{cite web|url=http://journal.mycom.co.jp/articles/2005/08/16/siggraph2/|archive-url=https://archive.today/20130218134920/http://journal.mycom.co.jp/articles/2005/08/16/siggraph2/|url-status=dead|archive-date=February 18, 2013|title=3D graphics processor "ULTRAY2000" basic specifications|date=August 16, 2005|publisher=journal.mycom.co.jp}}

Core clock 200 MHz produced in 130 nm TSMC process
256 MB DDR-400 SDRAM on 256-bit memory bus - 12.8 GB/s memory bandwidth
PCI interface bus supporting both 64-bit/66 MHz and 32-bit/33 MHz cards
Display outputs support with digital DVI-I and RGB analog Dsub-15 8DE-15/HD-15) connectors - only one display could be connected to output
Support for OpenGL 2.0, OpenGL ES 2.0 and Java Mobile 3D Graphics for J2ME ([https://web.archive.org/web/20090909075549/http://jcp.org/aboutJava/communityprocess/final/jsr184/ JSR-000184]) APIs - Mobile 3D Graphics for J2ME is more widely known as M3G 1.0/1.1 since 2007

NOTE: Exhibited part has not supported PCI Express bus because of high licensing fees, and the project's main business plan was focused on embedded platforms.

DMP “MAESTRO” and “MAESTRO-2G” Technology

=“MAESTRO” Technology=

“MAESTRO” is a sophisticated technology developed by modeling various computer graphics algorithms for later hardware implementation on proprietary solutions so that they can be built on silicon as advanced graphics solutions based on customer demands.{{cite web|url=http://journal.mycom.co.jp/news/2005/07/26/101.html|archive-url=https://web.archive.org/web/20070510115334/http://journal.mycom.co.jp/news/2005/07/26/101.html|url-status=dead|archive-date=May 10, 2007|title=DMP proprietary 3D graphics chip "ULTRAY2000" - will have a first public exhibition at SIGGRAPH|date=July 26, 2005|publisher=journal.mycom.co.jp}}{{cite web|url=http://www.dmprof.com/en/en_maestrotechnology.html|archive-url=https://web.archive.org/web/20100624223435/http://www.dmprof.com/en/en_maestrotechnology.html|url-status=dead|archive-date=June 24, 2010|title=Press Release: DMP "MAESTRO" Technology Breathes New Life into Real-Time CG|date=July 21, 2005|publisher=Digital Media Professionals Inc. (DMP)}}

“MAESTRO” technology features:{{cite web|url=http://journal.mycom.co.jp/articles/2005/08/16/siggraph2/001.html|archive-url=https://archive.today/20130218142753/http://journal.mycom.co.jp/articles/2005/08/16/siggraph2/001.html|url-status=dead|archive-date=February 18, 2013|title=3D graphics processing hardware implementation of DMP Maestro Technology|date=August 16, 2005|publisher=journal.mycom.co.jp}}

Shading Maestro (previously known as Material Maestro) - bidirectional reflectance distribution function (BRDF), subsurface scattering (SSS), which enable fast eye-candy rendering with various combinations of light reflection modeling to run at a higher resolution
Figure Maestro - figure processing technology that executes within the primitive processing, it includes geometry processing (Geometry Shader --"Geo Shader") and generating polygon subdivision (aka. Tessellation)
Shadow Maestro - shadow rendering enhancement which combines innovative shadow map generation method and shadow filtering process in generating shadow that applies to the final display space, and thus enable creation of beautiful partial soft-edged shadows and self shadows.
Particle Maestro - providing support for high-quality rendering of fuzzy objects which needs specific particle projection, quickly drawing gaseous form objects and beautifully renders clouds, smoke, gas and other fuzzy objects
Glare Maestro - hardware support for rendering lens flare and glare textures

=“MAESTRO-2G” Technology=

“MAESTRO-2G” technology is further refinement of previous “MAESTRO” generation focused on ability to render images at even higher resolutions by reducing processing contents size and memory bandwidth usage, and thus contributing to reducing energy consumption at the system level.

“MAESTRO-2G” technology additionally features:

Mapping Maestro - rendering algorithms for embedded graphics systems based on the texture mapping (specifically bump mapping, cube mapping, multitexturing, etc.) and procedural texturing reduced contents size and memory bandwidth requirements an by that improves overall application performance and removes any notion about previously supported Glare Maestro feature.

References

Category:Graphics hardware

Category:Graphics processing units