Ultracomputer

{{Short description|American processor design}}

The New York University's Ultracomputer is a significant processor design in the history of parallel computing. The system has N processors, N memories, and an N log N message-passing switch connecting them.{{elucidate|date=February 2022}} The system supported an innovative fetch-and-add process coordination instruction, and the custom VLSI network switches could combine references (including fetch-and-adds) from several processors into a single reference, to reduce memory contention.

The machine was developed in the 1980s at the Courant Institute of Mathematical Sciences Computer Science Department, based on a concept developed by Jacob T. Schwartz.{{cite journal |author=Jacob T. Schwartz |authorlink=Jacob T. Schwartz |title=Ultracomputers |journal=ACM Transactions on Programming Languages and Systems |volume=2 |issue=4 |pages=484–521 |date=October 1980 |doi=10.1145/357114.357116}} Most of the work done was theoretical, but two prototypes were built:[http://cs.nyu.edu/cs/projects/ultra/ The NYU Ultracomputer Project]{{cite report |title=An Overview of the NYU Ultracomputer Project |author=Allan Gottlieb |url=http://ceit.aut.ac.ir/~ardestani/Download/in/1987-An%20Overview%20of%20the%20NYU%20Ultracomputer%20Project.pdf |publisher=Ultracomputer Note #100, New York University |date=October 1987 |accessdate=October 30, 2016}}

• An 8-processor bus-based machine
• A 16-processor, 16 memory-module machine with custom VLSI switches supporting the fetch-and-add instruction.

Ultracomputer technology was the basis for the IBM Research Research Parallel Processor Prototype (RP3), an experimental parallel computer that supported 512 processing nodes. A 64-node system was built at the Thomas J. Watson Research Center in the late 1980s.{{cite magazine |magazine=InformationWeek

|title=IBM Puts Together RP3 and GF11

|author=W. David Gardner |date=May 4, 1987 |page=50}}