Zilog Z180

File:KL Zilog Z180.jpg package (the smaller 80-pin QFP and LQFP packages are more common today.)]]

The Zilog Z180 is an 8-bit microprocessor designed by Zilog as a successor to the Z80. It is compatible with the large base of software written for the Z80.{{cite web|url=http://www.z80.info/z80lives.htm|quote=The designers picked an architecture compatible with the Z80, giving Z80 users a completely software compatible upgrade path|title=The Z80 Lives!|last=Ganssle|first=Jack|year=1992}} The Z180 family adds higher performance and integrated peripheral functions like clock generator, 16-bit counters/timers, interrupt controller, wait-state generators, serial ports and a DMA controller.{{cite book|page=13|isbn=978-0-12-274880-6|author=Jack G. Ganssle.|year=1992|publisher=Academic Press|location=San Diego|title=The art of programming embedded systems}} It uses separate read and write strobes, sharing similar timings with the Z80 and Intel processors.{{cite book|page=[https://archive.org/details/embeddedmicropro00ball_775/page/n48 34]|isbn=978-0-7506-7534-5|author=Stuart R. Ball.|year=2002|publisher=Newnes|location=Amsterdam|title=Embedded microprocessor systems real world design|url=https://archive.org/details/embeddedmicropro00ball_775|url-access=limited}} The on-chip memory management unit (MMU) has the capability of addressing up to 1 MB of memory. It is possible to configure the Z180 to operate as the Hitachi HD64180.{{cite web |title=Z80 Application Note: Migrating from the Hitachi HD64180 to ZiLOG's Z80180, page 7 Summary |url=http://www.zilog.com/appnotes_download.php?FromPage=DirectLink&dn=AN0026&ft=Application%20Note&f=YUhSMGNEb3ZMM2QzZHk1NmFXeHZaeTVqYjIwdlpHOWpjeTk2TVRnd0wyRndjRzV2ZEdWekwyaGtOalF4T0RBdGJXbG5jbUYwYVc5dUxuQmtaZz09 |website=zilog.com/appnotes_download.php |publisher=Zilog Inc. |access-date=May 20, 2019}}

Variants

class="wikitable" ! Chip ! Speed (MHz) ! Timers ! I/O ! Comm. Contr. ! Others
---- ! Z80180	6, 8, 10	2 \| N/S	CPU	1 MB MMU, 2xDMAs, 2xUARTs
---- ! Z80181	10	1 \| 16	CPU	1 MB MMU, 2xDMAs, 2xUARTs
---- ! Z80182	16, 20, 33	2 \| Clock, Serial, 24	ESCC, CSIO, UART, PIO	S180 Megacell, 2xESCC channels, 3*8bit IO, 16550 MIMIC
---- ! Z80185/Z80195	20, 33	4 \| 7/24	SCC, CSIO, UART
---- ! Z8L180	20	2 \| Clock Serial	CSIO, UART	1 MB MMU, 2xDMAs, 2xUARTs, 3.3 V Operation
---- ! Z8L182	20	2 \| Clock, Serial, 24	ESCC, CSIO, UART, PIO	S180 Megacell, 2xESCC channels, 3*8bit IO, 16550 MIMIC, 3.3V operation
---- ! Z8S180	10, 20, 33	2 \| Clock Serial	UART, DMA	1 MB MMU, 2xDMAs, 2xUARTs
---- ! Z8S183	10, 20, 33	2 \| Clock Serial	UART, DMA	1 MB MMU, 2xDMAs, 2xUARTs 16550, MIMIC, 3.3V operation{{cite web\|url=http://www.ic72.com/pdf_file/z/193929.pdf\|title=Mixed-Signal Z183 Webserver\|access-date=2023-08-22}}
---- ! Z8S189	10, 20, 33	2 \| Clock Serial	UART, DMA	1 MB MMU, 2xDMAs, 2xUARTs, 3.3V operation{{Cite web\|url=http://datasheets.chipdb.org/Zilog/Z180/Z80189.pdf\|title=Www.Alldatasheet.Com}}

Z80182

The Zilog Z80182, introduced in 1997, is an enhanced, faster version of the older Z80 and is part of the Z180 microprocessor family. It is nicknamed the Zilog Intelligent Peripheral Controller (ZIP). It is also fully static (the clock can be halted and no data in the registers will be lost){{citation needed|date=July 2009}} and has a low EMI option that reduces the slew rate of the outputs.{{citation needed|date=July 2009}}

The Z80182 can operate at 33 MHz with an external oscillator for 5-volt operation, or at 20 MHz using the internal oscillator for 3.3-volt operation.{{cite book

| title = Z80182/Z8L182 Zilog Intelligent Peripheral Controller Product Specification

| year = 1997

| publisher = Zilog

| location = San Jose, California

| pages = 3–48

| chapter = CPU Control Register

}}