translinear circuit

The word translinear (TL) was invented by Barrie Gilbert in 1975{{Cite journal| last = Gilbert | first = Barrie | title = Translinear circuits: a proposed classification | journal = Electronics Letters | volume = 11 | issue = 1 | pages = 14–16 | date = 9 January 1975 | doi = 10.1049/el:19750011 | bibcode = 1975ElL....11...14G }} to describe circuits that used the exponential current-voltage relation of BJTs.{{Cite book| title = Analog VLSI: Circuits and Principles | author = Liu, Shih-Chii |author2=Jörg Kramer |author3=Giacomo Indiveri |author4=Tobias Delbrück |author5=Rodney Douglas | publisher = MIT Press | year = 2002 | isbn = 0-262-12255-3 | url = https://books.google.com/books?id=ewqb4aurZtMC}}{{Cite journal| author = Minch, Bradley A. | title = Analysis and Synthesis of Static Translinear Circuits | year = 2000 | id = CSL-TR-2000-1002 | journal = Cornell Computer Science Technical Reports| citeseerx = 10.1.1.141.1901 }} By using this exponential relationship, this class of circuits can implement multiplication, amplification and power-law relationships. When Barrie Gilbert described this class of circuits he also described the translinear principle (TLP) which made the analysis of these circuits possible in a way that the simplified view of BJTs as linear current amplifiers did not allow. TLP was later extended to include other elements that obey an exponential current-voltage relationship (such as CMOS transistors in weak inversion).{{Citation|last=Gilbert|first=Barrie|title=Translinear Circuits|date=1981|type=Handout, pp. 81}}{{Citation|last=Gilbert|first=Barrie|chapter=Translinear Circuits|date=1999-12-27|encyclopedia=Wiley Encyclopedia of Electrical and Electronics Engineering|publisher=John Wiley & Sons, Inc.|doi=10.1002/047134608x.w2302|isbn=0-471-34608-X}}

The translinear principle (TLP) is that in a closed loop containing an even number of translinear elements (TEs) with an equal number of them arranged clockwise and counter-clockwise, the product of the currents through the clockwise TEs equals the product of the currents through the counter-clockwise TEs or $\backslash ,\backslash !\; \backslash prod\_\{n\; \backslash epsilon\; CW\}I\_n\; =\; \backslash prod\_\{n\; \backslash epsilon\; CCW\}I\_n$

The TLP is dependent on the exponential current-voltage relationship of a circuit element. Thus, an ideal TE follows the relationship

$I=\backslash lambda\; I\_s\; e^\{\backslash eta\; V\; /\; U\_T\}$

where $I\_s$ is a pre-exponential scaling current, $\backslash lambda$ is a dimensionless multiplier to $I\_s$, $\backslash eta$ is a dimensionless multiplier to the gate-emitter voltage and $U\_T$ is the thermal voltage $kT/q$.

In a circuit, TEs are described as either clockwise (CW) or counterclockwise (CCW). If the arrow on the emitter points clockwise, it is considered a CW TE, if it points counterclockwise, it is considered a CCW TE. Consider an example:

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By Kirchhoff's voltage law, the voltage around the loop that goes from $V\_\{ref\}$ to $V\_\{ref\}$ must be 0. In other words, the voltage drops must equal the voltage increases. When a loop that only goes through the emitter-gate connections of TEs exists, we call it a translinear loop. Mathematically, this becomes

$\backslash ,\backslash !\; \backslash sum\_\{n\; \backslash epsilon\; CW\}V\_n\; =\; \backslash sum\_\{n\; \backslash epsilon\; CCW\}V\_n$

Because of the exponential current-voltage relationship, this implies TLP:

$\backslash ,\backslash !\; \backslash prod\_\{n\; \backslash epsilon\; CW\}I\_n\; =\; \backslash prod\_\{n\; \backslash epsilon\; CCW\}I\_n$

this is effectively because current is used as the signal. Because of this, voltage is the log of the signal and addition in the log domain is like multiplication of the original signal (i.e. $log(a)\; +\; log(b)\; =\; log(ab)$).

The translinear principle is the rule that, in a translinear loop, the product of the currents through the CW TEs is equal to the product of the currents through the CCW TEs.

For a detailed derivation of the TLP, and physical interpretations of the parameters in the ideal TE law, please refer to or.

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According to TLP,

$\backslash ,\backslash !\; \backslash prod\_\{n\; \backslash epsilon\; CW\}I\_n\; =\; \backslash prod\_\{n\; \backslash epsilon\; CCW\}I\_n$.

This means that $\backslash ,\backslash !\; I\_yI\_y=I\_xI\_u$ where $I\_u$ is the unit scaling current (i.e. the definition of unity for the circuit). This is effectively a squaring circuit where $\backslash ,\backslash !\; I\_x=I\_y^2$. This particular circuit is designed in what is known as an alternating topology, which means that CW TEs alternate with CCW TEs. Here's the same circuit in a stacked topology.

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The same equation applies to this circuit as to the alternating topology according to TLP.

The alternating translinear loop is also called type A and the stacked loop called type B.

In realizing the principle the difficulty is that it is current based. The only voltage that is relevant to the principle is the voltage between the nodes N1 and N2. These and all other potentials must allow the transistors to carry the currents while forward biased in such a way that the transistors can follow the principle.

What the nodes N1, N2 are depends on the type: For Type A the nodes are the emitter connections. For Type B the nodes are the connected bases of the upper BJT and the emitters of the lower.

For every pair of base connected transistors only one may have its collector connected to its base in diode connection and the input current set by the collector potential but the other may not be biased in the same way.

Both type A and B realize the same mathematical function with the difference being the voltage between the two nodes of which at least one is an emitter to emitter connection. For type A (alternating), with two emitter connected pairs, the voltage relates to the ratio between the currents within each base coupled pair. For type B (stacked/balanced), the node voltage is the sum of the two base emitter voltages in each pair and thus relates to the product of currents in each stacked base to emitter coupled pair. Thus if the voltage is forced in either case, two currents, one in each pair, must be variable.

In the type A (alternating loop) example below, a NMOSFET allows the correct tiny voltage between the emitter nodes of the emitter coupled pairs due to negative feedback, because a higher collector/gate voltage lowers its resistance such that, the base emitter voltage of the output BJT is small enough to let it out of saturation.

The collector potential of one of the inner BJT controls both the inner BJT's current by allowing the inner two BJTs to drop their emitter currents through the low residual voltage of the NMOSFET.

As the MOSFET should not operate in reverse drain source polarity this restricts the current relations or emitter potentials that the circuit can operate at.

Here are some example biasing schemes:

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The design of a 2-quadrant multiplier can be easily done using TLP. The first issue with this circuit is that negative values of currents need to be represented. Since all currents must be positive for the exponential relationship to hold (the log operation is not defined for negative numbers), positive currents must represent negative currents. The way this is done is by defining two positive currents whose difference is the current of interest.

A two quadrant multiplier has the relationship $\backslash ,\backslash !\; z=xy$ hold while allowing $\backslash ,\backslash !\; x$ to be either positive or negative. We'll let $\backslash ,\backslash !\; z=z^+-z^-$ and $\backslash ,\backslash !\; x=x^+-x^-$. Also note that $\backslash ,\backslash !\; x=I\_x/I\_u$ and $\backslash ,\backslash !\; x^+=I\_x^+/I\_u$ etc. Plugging these values into the original equation yields $\backslash ,\backslash !\; \backslash left(\backslash frac\{I\_z^+\}\{I\_u\}-\backslash frac\{I\_z^-\}\{I\_u\}\backslash right)=\backslash left(\backslash frac\{I\_x^+\}\{I\_u\}-\backslash frac\{I\_x^-\}\{I\_u\}\backslash right)\backslash left(\backslash frac\{I\_y\}\{I\_u\}\backslash right)$. This can be rephrased as $\backslash ,\backslash !\; (I\_z^+I\_u-I\_z^-I\_u)=(I\_x^+-I\_x^-)(I\_y)$. By equating the positive and negative portions of the equation, two equations that can be directly built as translinear loops arise:

$I\_yI\_x^+=I\_uI\_z^+$

$I\_yI\_x^-=I\_uI\_z^-$

The following are the alternating loops that implement the desired equations and some biasing schemes for the circuit.

Image:unbiased alt TL twoquadmult.png

Image:biased alt TL twoquadmult.png

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The TLP has been used in a variety of circuits including vector arithmetic circuits,{{Cite journal| last = Gilbert | first = Barrie | title = High-accuracy vector-difference and vector-sum circuits | journal = Electronics Letters | volume = 12 | issue = 11 | pages = 293–294 | date = 27 May 1976 | doi = 10.1049/el:19760226| bibcode = 1976ElL....12..293G }} current conveyors, current-mode operational amplifiers, and RMS-DC converters.{{Cite journal| last = Ashok | first = S. | title = Translinear root-difference-of-squares circuit | journal = Electronics Letters | volume = 12 | issue = 8 | pages = 194–195 | date = 15 April 1976 | doi = 10.1049/el:19760150| bibcode = 1976ElL....12..194A }} It has been in use since the 1960s (by Gilbert), but was not formalized until 1975. In the 1980s, Evert Seevinck's work helped to create a systematic process for translinear circuit design. In 1990 Seevinck invented a circuit he called a companding current-mode integrator{{Cite journal| last = Seevinck| first = Evert | title = Companding current-mode integrator: a new circuit principle for continuous-time monolithic filters | journal = Electronics Letters | volume = 26 | issue = 24 | pages = 2046–2047 | date = 22 November 1990 | doi = 10.1049/el:19901319| bibcode = 1990ElL....26.2046S }} that was effectively a first-order log-domain filter. A version of this was generalized in 1993 by Douglas Frey and the connection between this class of filters and TL circuits was made most explicit in the late 90s work of Jan Mulder et al. where they describe the dynamic translinear principle. More work by Seevinck led to synthesis techniques for extremely low-power TL circuits.{{Cite journal| last1 = Seevinck| first1 = Evert | title = CMOS Translinear Circuits for Minimum Supply Voltage | journal = IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing| volume = 47 | issue = 12 | pages = 1560–1564 | date = December 2000 | doi = 10.1109/82.899656 | last2 = Vittoz | first2 = E.A. | last3 = Du Plessi | first3 = M. | last4 = Joubert | first4 = T.H. | last5 = Beetge | first5 = W.}} More recent work in the field has led to the voltage-translinear principle, multiple-input translinear element networks, and field-programmable analog arrays (FPAAs).

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Category:Electronic circuits