ARM Cortex-A34
{{Infobox CPU
|name = ARM Cortex-A34
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|produced-start = 2019
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|designfirm = ARM Holdings
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|arch = ARMv8-A
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|numcores = 1–4 per cluster, multiple clusters
|l1cache = 16–128 KB (8–64 KB I-cache with parity, 8–64 KB D-cache) per core
|l2cache = 128–1024 KB
|l3cache = No
|application = Mobile
Network Infrastructure
Automotive designs
Servers
|predecessor = ARM Cortex-A32 (32-bit only)
|successor =
}}
The ARM Cortex-A34 is a low power central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Ltd.{{Cite web|title=Arm Cortex-A34 is a 64-bit Only Low-Power Core|url=https://www.cnx-software.com/2019/08/02/arm-cortex-a34-64-bit-only-low-power-core/|access-date=2021-01-24|website=www.cnx-software.com}}
Licensing
The Cortex-A34 is available as a SIP core to licensees whilst its design makes it suitable for integration with other SIP cores (e.g. GPU, display controller, DSP, image processor, etc.) into one die constituting a system on a chip (SoC).{{Cite web|last=Ltd|first=Arm|title=Cortex-A34|url=https://developer.arm.com/ip-products/processors/cortex-a/cortex-a34|access-date=2021-01-24|website=Arm Developer|language=en}}
Technical
| class="wikitable"
|Architecture |64-bit Armv8-A (AArch64 only) |
| Multicore
|Up to 4 core |
| Superscalar |
| Pipeline
|In order (like ARM Cortex-A53 and ARM Cortex-A55) |
| L1 I-Cache / D-Cache
|8k-64k |
| L2 Cache |
| ISA Support
|Only AArch64 for 64-bit VFPv4 Floating point |
| Debug & Trace
|CoreSight SoC-400 |
See also
- Comparison of ARMv8-A cores, ARMv8 family
- Comparison of ARMv7-A cores, ARMv7 family