John P. Hayes

Hayes was born and grew up in Newbridge, Ireland{{Cite web |title=Prof. John P. Hayes retires after half a century in computer architecture |url=https://cse.engin.umich.edu/stories/prof-john-p-hayes-retires-after-half-a-century-in-computer-architecture/ |access-date=2023-10-24 |website=Computer Science and Engineering |language=en-US}} and did his undergraduate studies at the National University of Ireland, Dublin, graduating in 1965. He went on to graduate studies at the University of Illinois at Urbana–Champaign, earning a master's degree in 1967 and a Ph.D. in 1970. He was responsible for the logic design of the input-output channel control units of ILLIAC III. After working in The Hague for Shell for two years, he returned to academia, taking a faculty position at the University of Southern California in 1972. In 1979 Hayes was a Visiting Associate Professor at Stanford. He moved to Michigan in 1982, where he was the founding director of the Advanced Computer Architecture Laboratory. Hayes retired from University of Michigan in 2023.{{cite web|url = https://cse.engin.umich.edu/stories/prof-john-p-hayes-retires-after-half-a-century-in-computer-architecture | title = Prof. John P. Hayes retires after half a century in computer architecture | publisher = University of Michigan Computer Science and Engineering| date = May 22, 2023 }}

Hayes is the author of the books

• Digital System Design and Microprocessors (McGraw-Hill, 1984, {{ISBN|0-07-027367-7}})
• Introduction to Digital Logic Design (Addison-Wesley, 1993, {{ISBN|978-0-201-15461-0}})
• Computer Architecture and Organization (3rd ed., McGraw-Hill, 2002, {{ISBN|978-0-07-286198-3}})
• Quantum Circuit Simulation (with George F. Viamontes and Igor L. Markov, Springer, 2009, {{ISBN|978-90-481-3064-1}})
• Design, Analysis and Test of Logic Circuits Under Uncertainty, (with Smita Krishnaswamy and Igor L. Markov, Springer, 2012, {{ISBN|978-90-481-9643-2}})

Hayes has written extensively on the use of hypercube graphs in supercomputing,{{citation

| last1 = Hayes | first1 = J. P.

| last2 = Mudge | first2 = T. N.

| last3 = Stout | first3 = Q. F.

| last4 = Colley | first4 = S.

| last5 = Palmer | first5 = J.

| contribution = Architecture of a hypercube supercomputer

| pages = 653–660

| title = Proc. International Conference on Parallel Processing

| year = 1986}}.

{{citation

| last1 = Hayes | first1 = J. P.

| last2 = Mudge | first2 = T.

| last3 = Stout | first3 = Q. F.

| last4 = Colley | first4 = S.

| last5 = Palmer | first5 = J.

| doi = 10.1109/MM.1986.304707

| issue = 5

| journal = IEEE Micro

| pages = 6–17

| title = A microprocessor-based hypercube supercomputer

| volume = 6

| year = 1986| s2cid = 7927930

}}. {{citation

| last1 = Lee | first1 = T. C.

| last2 = Hayes | first2 = J. P.

| doi = 10.1109/12.166602

| issue = 10

| journal = IEEE Transactions on Computers

| pages = 1242–1256

| title = A fault-tolerant communication scheme for hypercube computers

| volume = 41

| year = 1992}}.

{{citation

| last1 = Harary | first1 = Frank | author1-link = Frank Harary

| last2 = Hayes | first2 = John P.

| last3 = Wu | first3 = Horng-Jyh

| doi = 10.1016/0898-1221(88)90213-1

| issue = 4

| journal = Computers & Mathematics with Applications

| mr = 949280

| pages = 277–289

| title = A survey of the theory of hypercube graphs

| volume = 15

| year = 1988| hdl = 2027.42/27522

| hdl-access = free

}}.

He has also written highly cited research papers on fault-tolerant design,{{citation

| last = Hayes | first = J. P.

| doi = 10.1109/TC.1976.1674712

| issue = 9

| journal = IEEE Transactions on Computers

| pages = 875–884

| title = A Graph Model for Fault-Tolerant Computing Systems

| volume = C-25

| year = 1976| s2cid = 24323472

}}. reversible computing,{{citation

| last1 = Shende | first1 = V. V.

| last2 = Prasad | first2 = A. K.

| last3 = Markov | first3 = I. L.

| last4 = Hayes | first4 = J. P.

| doi = 10.1109/TCAD.2003.811448

| issue = 6

| journal = IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

| pages = 710–722

| title = Synthesis of reversible logic circuits

| volume = 22

| year = 2003| arxiv = quant-ph/0207001}}. and stochastic computing.{{Cite journal | last1 = Alaghi | first1 = A. | last2 = Hayes | first2 = J. P. | doi = 10.1145/2465787.2465794 | title = Survey of Stochastic Computing | journal = ACM Transactions on Embedded Computing Systems | volume = 12 | issue = 2s | pages = 1 | year = 2013 | s2cid = 4689958 }}

Hayes became an IEEE Fellow in 1985 "for contributions to digital testing techniques and to switching theory and logical design",[http://www.ieee.org/membership_services/membership/fellows/chronology/fellows_1985.html IEEE Fellow class of 1985] {{webarchive|url=https://web.archive.org/web/20110629021152/http://www.ieee.org/membership_services/membership/fellows/chronology/fellows_1985.html |date=2011-06-29 }}, retrieved 2012-02-20. and an ACM Fellow in 2001 "for outstanding contributions to logic design and testing and to fault-tolerant computer architecture."[http://fellows.acm.org/fellow_citation.cfm?id=1076777&srt=all ACM Fellow award citation], retrieved 2012-02-20. In 2004, the University of Illinois Urbana-Champaign department of electrical and computer engineering gave him their distinguished alumni award.[http://www.ece.illinois.edu/alumni/awards/distinguished/04-hayes.html Distinguished Alumni Award (2004): John P. Hayes (MSEE ’67, PhD ’70)], Univ. of Illinois, retrieved 2012-02-20.

In 2013, the IEEE Computer Society Test Technology Technical Community honored Hayes with Lifetime Contribution Medal.{{Cite web|url = https://www.ieee-tttc.org/tttc-lifetime-contribution-medal/ | title = TTTC Lifetime Contribution Medal | access-date = July 30, 2023 | publisher = IEEE Test Technology Technical Community}}

In 2014, Hayes was recognized with ACM

Special Interest Group on Design Automation Pioneering Achievement Award "for his pioneering contributions to logic design, fault tolerant computing, and testing.”{{Cite web|url =

https://cse.engin.umich.edu/stories/john-p-hayes-recognized-with-acm-sigda-pioneering-achievement-award | title = John P. Hayes Recognized with ACM SIGDA Pioneering Achievement Award | date = November 4, 2014 | publisher = University of Michigan Computer Science and Engineering}}{{Cite web | url = https://www.sigda.org/awards/pioneer/ | title = SIGDA Pioneering Achievement Award | date = 18 June 2019 | publisher= ACM Special Interest Group on Design Automation | access-date = August 5, 2023}}

• John P. Hayes, Trevor N. Mudge, Quentin F. Stout, Stephen Colley, John Palmer: A Microprocessor-based Hypercube Supercomputer. IEEE Micro 6(5): 6-17 (1986)
• Ram Raghavan, John P. Hayes: On randomly interleaved memories. ACM/IEEE Supercomputing Conference 1990: 49-58
• Avaneendra Gupta, John P. Hayes: A Hierarchical Technique for Minimum-Width Layout of Two-Dimensional CMOS Cells. VLSI Design 1997: 15-20
• HyungWon Kim, John P. Hayes: Delay Fault Testing of Designs with Embedded IP Cores. IEEE VLSI Test Symposium (VTS) 1999: 160-167
• Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes:Synthesis of reversible logic circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22(6): 710-722 (2003){{Cite web |title=IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award {{!}} IEEE Council on Electronic Design Automation |url=https://ieee-ceda.org/awards/ieee-transactions-computer-aided-design-donald-o-pederson-best-paper-award |access-date=2023-08-13 |website=ieee-ceda.org |language=en}}
• Smita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes: Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices. Design Automation and Test in Europe (DATE) 2005: 282-287{{Cite web |title=Best Paper Awards DATE 2006 |url=https://past.date-conference.com/proceedings-archive/2006/DATE06/PDFFILES/BESTPPR.PDF |access-date=August 12, 2023}}
• Pai-Shun Ting, John P. Hayes: Eliminating a hidden error source in stochastic circuits. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) 2017: 1-6.{{Cite web| url = https://cse.engin.umich.edu/stories/michigan-researchers-win-best-paper-award-at-dft-2017 | title = Michigan researchers win best paper award at DFT 2017 | publisher = University of Michigan Computer Science and Engineering | date = November 10, 2017}}

• Krishnendu Chakrabarty (Arizona State University)
• Shawn Blanton (CMU)

{{reflist|colwidth=30em}}

• [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=7910 Mathematics Genealogy]

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Category:Year of birth missing (living people)

Category:Living people

Category:Alumni of University College Dublin

Category:American computer scientists

Category:American electrical engineers

Category:Irish computer scientists

Category:Fellows of the IEEE

Category:2001 fellows of the Association for Computing Machinery

Category:Grainger College of Engineering alumni

Category:University of Michigan faculty

Category:University of Southern California faculty