List of VIA microprocessor cores

This article lists x86-compliant microprocessors sold by VIA Technologies, grouped by technical merits: cores within same group have much in common.

[[Cyrix]] design ([[Cyrix III]])

All models{{cite web | title = IA-32 implementation: VIA Cyrix III | publisher = sandpile.org | url = http://sandpile.org/impl/m2c3.htm | accessdate = 2007-07-23 | url-status = dead | archiveurl = https://web.archive.org/web/20070709200826/http://www.sandpile.org/impl/m2c3.htm | archivedate = 2007-07-09 }} support: MMX, 3DNow!

class="wikitable"

!Marketing
name

Core

Frequency

Front-side bus

L1-cache

L2-cache

FPU
speed

Pipeline
stages

Typical power

Voltage

Process

Cyrix III

Joshua

350-450 MHz

100-133 MHz

64 KB

256 KB

100%

13-16 W

2.2 V

180 nm Al

[[Centaur Technology]] design

= [[Cyrix III]], [[VIA C3|C3]] =

All models{{cite web | title = IA-32 implementation: VIA C3 | publisher = sandpile.org | url = http://sandpile.org/impl/c5.htm | accessdate = 2007-07-23 | url-status = dead | archiveurl = https://web.archive.org/web/20070717014946/http://www.sandpile.org/impl/c5.htm | archivedate = 2007-07-17 }} support: MMX, 3DNow!

class="wikitable" !Marketing name	Core	Frequency	Front-side bus	L1 cache	L2 cache	FPU speed	Pipeline stages	Typical power	Voltage	Process
Cyrix III, C3, 1GigaPro	Samuel (C5A)	466-733 MHz	100-133 MHz	128 KB	0 KB	50%	12	6.8-10.6 W	1.8-2.0 V	180 nm Al
Cyrix III, C3, 1GigaPro, Eden ESP, XP 2000+	Samuel 2 (C5B)	600-800 MHz	100-133 MHz	128 KB	64 KB	50%	12	5.8-6.6 W	1.5-1.65 V	150 nm Al
C3, Eden ESP	Ezra (C5C)	733-933 MHz	100-133 MHz	128 KB	64 KB	50%	12	5.3-5.9 W	1.35 V	130 nm Al
C3	Ezra-T (C5N)	800-1000 MHz	100-133 MHz	128 KB	64 KB	50%	12	5.3-11.8 W	1.35-1.45 V	130 nm Al

= [[VIA C3|C3]], [[VIA C7|C7]] =

All models{{cite web | title = IA-32 implementation: VIA C7 | publisher = sandpile.org | url = http://sandpile.org/impl/c5xl.htm | accessdate = 2007-07-23 | url-status = dead | archiveurl = https://web.archive.org/web/20070630151130/http://www.sandpile.org/impl/c5xl.htm | archivedate = 2007-06-30 }} support: MMX, SSE
SSE2, SSE3, NX bit supported by Esther (C5J)
x86 (no x86-64)

class="wikitable" !Marketing name	Core	Frequency	Front-side bus	L1 cache	L2 cache	FPU speed	Pipeline stages	Typical power	Voltage	Process
C3, Eden ESP, Eden-N	Nehemiah (C5XL)	800-1400 MHz	133 MHz	128 KB	64 KB	100%	16	15-19 W	1.25 or 1.4-1.45 V	130 nm Cu
C3	Nehemiah+ (C5P)	1-1.4 GHz	133 MHz	128 KB	64 KB	100%	16	11-12 W	1.25 V	130 nm Cu
C7, C7-D, C7-M, Eden, Eden ULV	Esther (C5J)	0.4-2.0 GHz	400-533 MT/s	128 KB	128 KB	100%	16	12-20 W	0.9-1.1(?) V	90 nm SOI

rowspan=5\|Eden \|Eden ESP\|\|Samuel 2 \|300–600\|\|66/100/133\|\|2001\|\|150\|\|35×35\|\|2.5–6\|\|64\|\|64/64\|\|{{unk}}
class="wikitable sortable" summary="This table contains specifications for certain VIA processors" style="text-align: right;"
style="vertical-align: top;white-space:nowrap" ! Series ! Model ! Core ! abbr="Frequency" \| Frequency [MHz] ! abbr="Front Side Bus" \| Front-side bus [MHz] ! Year ! abbr="Process" \| Process [nm] ! abbr="Size" \| Package size [mm²] ! abbr="Power" \| Power [W] ! abbr="L2 Cache" \| L2 cache [K] ! abbr="L1 Cache" \| L1 I/D cache [K] ! abbr="Perf" \| Performance [SPEC2000]
Eden ESP	Nehemiah \|667–1000	133/200	2003–2004	130	35×35	6–7	64	64/64	{{unk}}
Eden-N	Nehemiah \|533–1000	133	2003	130	15×15	2.5–7	64	64/64	{{unk}}
Eden	Esther \|400–1500	400–800	2006–2007	90	30	<7.5	128	32/32	{{unk}}
Eden X2	{{unk}} \|800	{{unk}}	2011	40	11×6	{{unk}}	{{unk}}	{{unk}}	{{unk}}
rowspan=4\|C3 \|C3\|\|Samuel 2 \|667–800\|\|100–133\|\|2001\|\|150\|\|{{unk}}\|\|13\|\|64\|\|64/64\|\|{{unk}}
C3	Ezra \|800–1000	100–133	2002	130	{{unk}}	8.3–10	64	64/64	{{unk}}
C3	Nehemiah \|1000–1400	133–200	2003	130	35×35	15–21	64	64/64	{{unk}}
C3-M	Nehemiah \|1000–1400	133–200	2003	130	35×35	11–19	64	64/64	{{unk}}
rowspan=3\|C7 \|C7-D\|\|Esther \|1500–1800\|\|400\|\|2006\|\|90\|\|21×21\|\|20–25\|\|128\|\|16/16\|\|{{unk}}
C7-M	Esther \|1000–2000	400	2005	90	21×21	12–20	128	16/16	{{unk}}
C7	Esther \|1500–2000	800	2007	90	21×21	12–20	128	16/16	{{unk}}
r>17.1/14.5 rate{{cite web \|url=http://www.via.com.tw/en/products/processors/nanoX2/whitepaper.jsp \|title=VIA Nano X2 SPEC2000 ratio and rate scores \|publisher=Via.com \|accessdate=2014-02-03 \|url-status=dead \|archiveurl=https://web.archive.org/web/20140207105837/http://www.via.com.tw/en/products/processors/nanoX2/whitepaper.jsp \|archivedate=7 February 2014 \|df=dmy-all }}

= [[VIA Nano|Nano]] =

First VIA processor with x86-64 instruction set

class="wikitable sortable" summary="This table contains specifications for certain VIA processors" style="text-align: right;"
style="vertical-align: top;white-space:nowrap" ! Series ! Model ! Core ! abbr="Frequency" \| Frequency [MHz] ! abbr="Front Side Bus" \| Front-side bus [MHz] ! Year ! abbr="Process" \| Process [nm] ! abbr="Size" \| Package size [mm²] ! abbr="Power" \| Power [W] ! abbr="L2 Cache" \| L2 cache [K] ! abbr="L1 Cache" \| L1 I/D cache [K] ! abbr="Perf" \| Performance [SPEC2000]
\|QuadCore \|QuadCore\|\|Isaiah \|1000-1460\|\|1066\|\|2011\|\|40\|\|21×21\|\|27.5\|\|4× 1024{{cite web \|url=http://www.via.com.tw/en/products/processors/quadcore/index.jsp \|title=VIA QuadCore Processor \|publisher=Via.com \|accessdate=2014-02-03}}\|\|4× 64/64\|\|30.1/24.1 rate{{cite web \|url=http://www.via.com.tw/en/downloads/whitepapers/processors/NanoX2_whitepaper_201107.pdf \|title=VIA Nano X2 Whitepaper \|publisher=Via.com \|accessdate=2014-02-03 \|url-status=dead \|archiveurl=https://web.archive.org/web/20120527051549/http://www.via.com.tw/en/downloads/whitepapers/processors/NanoX2_whitepaper_201107.pdf \|archivedate=27 May 2012 \|df=dmy-all }}

class="wikitable sortable" summary="This table contains specifications for certain VIA processors" style="text-align: right;"

style="vertical-align: top;white-space:nowrap"

! Series

! Model

! Core

! abbr="Frequency" | Frequency
[MHz]

! abbr="Front Side Bus" | Front-side bus
[MHz]

! Year

! abbr="Process" | Process
[nm]

! abbr="Size" | Package size
[mm²]

! abbr="Power" | Power
[W]

! abbr="L2 Cache" | L2 cache
[K]

! abbr="L1 Cache" | L1 I/D cache
[K]

! abbr="Perf" | Performance
[SPEC2000]

|QuadCore

|QuadCore||Isaiah

|1000-1460||1066||2011||40||21×21||27.5||4× 1024{{cite web |url=http://www.via.com.tw/en/products/processors/quadcore/index.jsp |title=VIA QuadCore Processor |publisher=Via.com |accessdate=2014-02-03}}||4× 64/64||30.1/24.1 rate{{cite web |url=http://www.via.com.tw/en/downloads/whitepapers/processors/NanoX2_whitepaper_201107.pdf |title=VIA Nano X2 Whitepaper |publisher=Via.com |accessdate=2014-02-03 |url-status=dead |archiveurl=https://web.archive.org/web/20120527051549/http://www.via.com.tw/en/downloads/whitepapers/processors/NanoX2_whitepaper_201107.pdf |archivedate=27 May 2012 |df=dmy-all }}

See List of Nano microprocessors

= CHA =

Announced 2019.{{Cite web|date=November 18, 2019h|title=VIA CenTaur Develops a Multi-core x86 Processor for Enterprise with in-built AI Hardware|url=https://www.techpowerup.com/261274/via-centaur-develops-a-multi-core-x86-processor-for-enterprise-with-in-built-ai-hardware|access-date=2020-07-28|website=TechPowerUp|language=en}}{{Cite web|date=February 18, 2020|title=VIA CenTaur CHA NCORE AI CPU Pictured, a Socketed LGA Package|url=https://www.techpowerup.com/263978/via-centaur-cha-ncore-ai-cpu-pictured-a-socketed-lga-package|access-date=2020-07-28|website=TechPowerUp|language=en}}{{Cite web|title=CHA - Microarchitectures - Centaur Technology - WikiChip|url=https://en.wikichip.org/wiki/centaur/microarchitectures/cha|access-date=2020-07-28|website=en.wikichip.org|language=en}} Discontinued in 2021 with the sales of Centaur to Intel.{{cite web |title=The Last x86 Via Chip: Unreleased Next-Gen Centaur CNS Saved From Trash Bin, Tested |url=https://www.tomshardware.com/news/last-x86-via-chip-centuar-cns-cpu-tested |website=TomsHardware |date=22 February 2022}}
8 cores + "NCORE" neural processor for AI acceleration.
supports: MMX SSE SSE2 SSE3 SSSE3 SSE4.1 SSE4.2 AES AVX AVX2 FMA3 SHA AVX512 AVX512F AVX512CD AVX512BW AVX512DQ AVX512VL AVX512IFMA AVX512VBMI.

class="wikitable"

!Marketing
name

!Code name

Core

Number of cores

Frequency

Microarchitecture

!L1 cache

!L2 cache

! L3 cache

Announced

!Expected Release

Process

!Socket Type

!Pipeline stages

!PCIe Lanes

unknown

|CHA

CNS

2.5 GHz

CNS{{Cite web|last=|first=|date=December 11, 2019|title=VIA x86 AI processor architecture, performance announcement: comparable to Intel 32 core|url=https://www.smalltechnews.com/archives/36581|access-date=|website=Small Tech News}}

|32 KiB

|256 KiB

16 MB

2019

|2H 2020{{Cite web|date=December 9, 2019|title=Centaur Releases In-Depth Analysis from The Linley Group for its NCORE-Equipped x86 Processor|url=https://www.techpowerup.com/261979/centaur-releases-in-depth-analysis-from-the-linley-group-for-its-ncore-equipped-x86-processor|access-date=2020-08-30|website=TechPowerUp|language=en}}

| 16 nm

|LGA

|20-22

|44{{Cite web|last=|first=|date=|title=World's First High-Performancex86 SoCwithIntegrated AI Coprocessor|url=https://centtech.com/wp-content/uploads/PRSlides_1118_Release.pdf|url-status=usurped|archive-url=https://web.archive.org/web/20191119163412/https://centtech.com/wp-content/uploads/PRSlides_1118_Release.pdf|archive-date=November 19, 2019|access-date=|website=centtech|page=4}}

References

External links

[http://www.via.com.tw/en/products/processors/c3/ Via C3 product page] {{Webarchive|url=https://web.archive.org/web/20070502102646/http://www.via.com.tw/en/products/processors/c3/ |date=2007-05-02 }}
[http://www.via.com.tw/en/products/processors/c7/ Via C7 product page] {{Webarchive|url=https://web.archive.org/web/20070419142654/http://www.via.com.tw/en/products/processors/c7-m/ |date=2007-04-19 }}
[http://www.via.com.tw/en/products/processors/nano/ Via Nano product page] {{Webarchive|url=https://web.archive.org/web/20080530071601/http://www.via.com.tw/en/products/processors/nano/ |date=2008-05-30 }}

VIA