Template:Programmable logic
{{Navbox
|name = Programmable logic
|title = Programmable logic
|listclass = hlist
|group1 = Concepts
|list1 =
- ASIC
- SoC
- FPGA
- Logic block
- CPLD
- EPLD
- PLA
- PAL
- GAL
- PSoC
- Reconfigurable computing
- Xputer
- Soft microprocessor
- Circuit underutilization
- High-level synthesis
- Hardware acceleration
|group2 = Languages
|list2 =
- Verilog
- A
- AMS
- VHDL
- AMS
- VITAL
- SystemVerilog
- DPI
- SystemC
- AHDL
- Handel-C
- Lola
- PSL
- UPF
- PALASM
- ABEL
- CUPL
- C to HDL
- Flow to HDL
- MyHDL
- ELLA
- Chisel
|group3 = Companies
|list3 =
- Accellera
- Achronix
- AMD
- Aldec
- Arm
- Cadence
- Infineon
- Intel
- Lattice
- Microchip Technology
- NXP
- Siemens
- Synopsys
- Texas Instruments
|group4 = Products
|list4 = {{Navbox|subgroup
|group1 = Hardware
|list1 =
|group2 = Software
|list2 =
|group3 = Intellectual
property
|list3 = {{Navbox|subgroup
|group1 = Proprietary
|list1 =
|group2 = Open-source
|list2 =
}}
}}
}}