List of Intel Pentium processors
{{Short description|None}}
{{for|a shorter list of the latest processors by Intel|List of Intel processors#Latest}}
{{Primary sources|date=July 2022}}
File:Intel Pentium Processor.svg
File:Intel Pentium 2020 logo.svg
The Intel Pentium brand was a line of mainstream x86-architecture microprocessors from Intel. Processors branded Pentium Processor with MMX Technology (and referred to as Pentium MMX for brevity) are also listed here. It was replaced by the Intel Processor brand in 2023.
{{TOC limit|3}}
Desktop processors
= P5 based Pentiums =
== "P5" (800 nm) ==
{{cpulist|p5|head}}
{{cpulist|p5|p5|model=Pentium 50
|l1=16|fsb=50|mult=1|volt=5 V|tdp=|date=|links=1
|sspec=Q0399 (B1) These are engineering samples only. CPUID = 0513h
|sock=4
|part1=A80500-50|part2=}}
{{cpulist|p5|p5|model=Pentium 60
|l1=16|fsb=60|mult=1|volt=5 V|tdp=14.6|date=March 22, 1993|links=1
|sspec=Q0352, Q0394, Q0400, Q0412, SX753, SX842 (B1), Q0466, SX835, SZ949 (C1), Q0625, SX948, SX974 (D1), SX926
|sock=4
|part1=A80501-60|part2=PCPU5V60}}
{{cpulist|p5|p5|model=Pentium 66
|l1=16|fsb=66|mult=1|volt=5.15 V|tdp=16|date=March 22, 1993
|sspec=Q0353, Q0395, Q0413, SX754, SX828 (B1), Q0467, SX836, SX837, SZ950 (C1), Q0626, Q0627, SX949, SX950 (D1)
|sock=4
|part1=A80501-66|part2=PCPU5V66}}
{{end}}
== "P54C" (600 nm) ==
- Based on P5 microarchitecture
- Steppings: B1, B3, B5, C2, E0 (Note: D1 stepping processors do not have FDIV bug)
{{cpulist|p5|head}}
{{cpulist|p5|p54c|model=Pentium 75|ark=49961
|l1=16|fsb=50|mult=1.5|vmin=3.135|vmax=3.6|tdp=8|date=October 10, 1994|links=1
|sspec=Q0601, SX878 (B1), Q0666, Q0704, SX961, SX975, SX977 (B5), Q0700, Q0725, Q0749, SX969, SX998, SK079 (C2), Q0837, Q0846, SY005, SY009, SU097, SU098 (E0)
|sock1=Socket 5|sock2=Socket 7
|part1=A80502-75|part2=BP80502-75|part3=PCPU3V75}}
{{cpulist|p5|p54c|model=Pentium 90|ark=49962
|l1=16|fsb=60|mult=1.5|vmin=3.135|vmax=3.6|tdp=9|date=March 7, 1994
|sspec=Q0542, Q0613, Q0543, SX879, SX885, SX909, SX874 (B1), Q0628, Q0611, Q0612, SX923, SX922, SX921, SX942, SX943, SX944, SZ951 (B3), Q0653, Q0654, Q0655, SX957, SX958, SX959, SX978 (B5), Q0668, SX999, SZ995, SU031 (C2), Q0783, SY006, SL2WW (E0)
|sock1=Socket 5|sock2=Socket 7
|part1=A80502-90|part2=BP80502-90|part3=PCPU3V90}}
{{cpulist|p5|p54c|model=Pentium 100|ark=49954
|l1=16|fsb=50|mult=2|vmin=|vmax=|tdp=|date=
|sspec=
|sock1=Socket 5|sock2=Socket 7
|part1=}}
{{cpulist|p5|p54c|model=Pentium 100|ark=49955
|l1=16|fsb=66|mult=1.5|vmin=3.135|vmax=3.6|tdp=10.1|date=March 7, 1994
|sspec=Q0563, Q0587, Q0614, SX886, SX910 (B1), Q0677, SX960 (B3), Q0656, Q0657, Q0658, SX962 (B5), Q0697, Q0698, SX963, SX970, SZ996, SU032 (C2), Q0784, SY007, SU099, SU110 (E0)
|sock1=Socket 5|sock2=Socket 7
|part1=A80502100|part2=A80502-100|part3=BP80502100|part4=BP80502-100|part=
- BOXBP80502-100
- PCPU3V100}}
{{cpulist|p5|p54c|model=Embedded Pentium 100
|l1=16|fsb=66|mult=1.5|vmin=3.135|vmax=3.6|tdp=10.1|date=
|sspec=SL2TU (cC0)
|sock=
|part1=A80502100}}
{{end}}
== "P54CQS" (350 nm) ==
- Based on P5 microarchitecture
{{cpulist|p5|head}}
{{cpulist|p5|p54cs|model=Pentium 120|ark=49956
|l1=16|fsb=60|mult=2|vmin=3.135|vmax=3.6|tdp=12.81|date=March 27, 1995
|sspec=Q0711, Q0732, SU033, SK086, SX994 (C2), Q0785, SY033, SU100 (E0)
|sock1=Socket 5|sock2=Socket 7
|part1=A80502120|part2=A80502-120|part3=BP80502120|part4=BP80502-120}}
{{end}}
== "P54CS" (350 nm) ==
- Based on P5 microarchitecture
{{cpulist|p5|head}}
{{cpulist|p5|p54cs|model=Pentium 133|ark=49963
|l1=16|fsb=66|mult=2|vmin=3.135|vmax=3.6|tdp=11.2|date=June 1, 1995|links=1
|sspec=S106J, SK098 (C2), SK106 (cB1), SK106J (cB1), SK107 (cB1), SY022 (cC0), SY023 (cC0), SY082, SY126, SL22Q (cC0), SL25L (cC0), SU038 (cB1), SU073 (cC0)
|sock=7
|part1=A80502133|part2=A80502-133|part3=BP80502133|part4=BOXBP80502-133}}
{{cpulist|p5|p54cs|model=Pentium 150|ark=49958
|l1=16|fsb=60|mult=2.5|vmin=3.135|vmax=3.6|tdp=11.6|date=January 4, 1996
|sspec=SY015 (cC0), SU071 (cC0), SU122 (cC0)
|sock=7
|part1=A80502150|part2=BP80502150|part3=BOXBP80502-150}}
{{cpulist|p5|p54cs|model=Pentium 166|ark=49965
|l1=16|fsb=66|mult=2.5|vmin=3.135|vmax=3.6|tdp=14.5|date=January 4, 1996
|sspec=SL24R (cC0), SY016 (cC0), SY017 (cC0), SY055 (cC0), SU072 (cC0), SY037 (cC0)
|sock=7
|part1=A80502166|part2=BP80502166|part3=BOXBP80502-166|part4=FV80502166}}
{{cpulist|p5|p54cs|model=Pentium 200|ark=49966
|l1=16|fsb=66|mult=3|vmin=3.135|vmax=3.6|tdp=15.5|date=June 10, 1996
|sspec=SL25H (cC0), SU114 (cC0), SL24Q (cC0), SY044 (cC0), SY045 (cC0)
|sock=7
|part1=A80502200|part2=BP80502200|part3=BOXBP80502-200|part4=FV80502200}}
{{cpulist|p5|p54cs|model=Embedded Pentium 133
|l1=16|fsb=66|mult=2|vmin=3.135|vmax=3.6|tdp=11.2|date=|links=1
|sspec=SY022 (cC0)
|sock=
|part1=A80502133}}
{{cpulist|p5|p54cs|model=Embedded Pentium 133 with VRE
|l1=16|fsb=66|mult=2|vmin=Core=3.1 I/O=3.3|vmax=|tdp=7.9 (Max.12.25)|date=
|sspec=SY028 (mcC0)
|sock=7
|part1=A80502133}}
{{cpulist|p5|p54cs|model=Embedded Pentium 166
|l1=16|fsb=66|mult=2.5|vmin=3.135|vmax=3.6|tdp=14.5|date=
|sspec=SY016 (cC0)
|sock=
|part1=A80502166}}
{{end}}
== "P55C" (350 nm) ==
- Based on P5 microarchitecture
{{cpulist|p5|head}}
{{cpulist|p5|p55c|model=Pentium MMX 166|ark=49965
|l1=32|fsb=66|mult=2.5|vmin=2.7|vmax=2.9|tdp=13.1|date=January 8, 1997
|sspec=SL239 (xA3), SL26V (xA3), SL27K (xB1), SL27X (xB1), SL23R (xA3), SL23T (xA3), SL23V (xB1), SL23X (xB1), SL25M (xA3), SL2FP (xB1), SL2HU (xA3), SL2HX (xB1), SL26H (xA3), SL27H (xB1), SL27M, SY059 (xA3)
|sock=7
|part1=A80503166|part2=BP80503166|part3=FV80503166}}
{{cpulist|p5|p55c|model=Pentium MMX 200|ark=49966
|l1=32|fsb=66|mult=3|vmin=2.7|vmax=2.9|tdp=15.7|date=January 8, 1997
|sspec=SL2RY (xB1), SL23S (xA3), SL23W (xB1), SL25N (xA3), SL26Q (xA3), SL274 (xA3), SL28J, SL2FQ (xB1), SL2S9 (xB1), SL26J (xA3), SL27J (xB1), SL2Z8, SY060 (xA3)
|sock=7
|part1=A80503200|part2=BP80503200|part3=FV80503200}}
{{cpulist|p5|p55c|model=Pentium MMX 233|ark=49967
|l1=32|fsb=66|mult=3.5|vmin=2.7|vmax=2.9|tdp=17|date=June 2, 1997
|sspec=SL293 (xB1), SL2BM (xB1), SL27S (xB1)
|sock=7
|part1=BP80503233|part2=FV80503233}}
{{cpulist|p5|p55c|model=Embedded Pentium MMX 200
|l1=32|fsb=66|mult=3|vmin=3.135|vmax=3.6|tdp=15.7|date=September 29, 1997|links=1
|sspec=SL27J (xB1)
|sock=7
|part1=FV80503200}}
{{cpulist|p5|p55c|model=Embedded Pentium MMX 233
|l1=32|fsb=66|mult=3.5|vmin=3.135|vmax=3.6|tdp=17|date=?
|sspec=SL27S (xB1)
|sock=7
|part1=FV80503233}}
{{end}}
= P6 based Pentiums =
{{Main|List of Intel Pentium Pro processors|List of Intel Pentium II processors|List of Intel Pentium III processors}}
Desktop processors based on the P6 microarchitecture were marketed as Pentium Pro, Pentium II and Pentium III, as well as variations of these names.
= NetBurst based Pentiums =
= Core based Pentiums =
Earlier E5xxx desktop processors based on the Core microarchitecture were marketed as Pentium Dual-Core, while later E5xxx and all E6xxx models were named Pentium. Note however, that several resellers will still refer to the newer generation processors as Pentium Dual-Core.
== [[Conroe (microprocessor)#Allendale|"Allendale"]], [[Conroe (microprocessor)#Conroe|"Conroe"]] (65 nm) {{anchor|"Allendale" (65 nm)|"Conroe" (65 nm)|L2 and M0 stepping Conroes are Allendale}} ==
File:Closeup of intel pentium E2180.jpg
The Intel Pentium Dual-Core processors, E2140, E2160, E2180, E2200, and E2220 use the Allendale core, which includes 2 MB of native L2 cache, with half disabled leaving only 1 MB. This compares to the higher end Conroe core which features 4 MB L2 Cache natively. Intel has shifted its product lines having the Core 2 line as Mainstream/Performance, Pentium Dual-Core as Mainstream, and the new Celeron (based on the Conroe-L core) as Budget/Value.
- Based on the 64-bit Core microarchitecture.
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation)
- Die size: 77 mm² (Allendale-1M), 111 mm² (Allendale), 143 mm² (Conroe)
- Steppings: L2, M0 (Allendale), G0 (Conroe)
{{cpulist|core|head}}
{{cpulist|core|conroe|model=Pentium Dual-Core E2140|ark=29738|l1=64K
|l2=1|fsb=800|mult=8|vmin=1.162|vmax=1.312|date=June 3, 2007|links=1
|sspec1=SLA3J|step1=L2|part1=HH80557PG0251M
|sspec2=SLA93|step2=M0
|sspec3=SLALS|step3=G0}}
{{cpulist|core|conroe|model=Pentium Dual-Core E2160|ark=29739|l1=64K
|l2=1|fsb=800|mult=9|vmin=1.162|vmax=1.312|date=June 3, 2007
|sspec1=SLA3H|step1=L2|part1=HH80557PG0331M
|sspec2=SLA8Z|step2=M0
|sspec3=SLA9Z|step3=G0
|sspec4=SLASX|step4=G0}}
{{cpulist|core|conroe|model=Pentium Dual-Core E2180|ark=31733|l1=64K
|l2=1|fsb=800|mult=10|vmin=0.85|vmax=1.50|date=August 26, 2007
|sspec1=SLA8Y|step1=M0|part1=HH80557PG0411M}}
{{cpulist|core|conroe|model=Pentium Dual-Core E2200|ark=33925|l1=64K
|l2=1|fsb=800|mult=11|vmin=0.85|vmax=1.50|date=December 2, 2007
|sspec1=SLA8X|step1=M0|part1=HH80557PG0491M
|sspec2=SLAM4|step2=M0}}
{{cpulist|core|conroe|model=Pentium Dual-Core E2220|ark=32430|l1=64K
|l2=1|fsb=800|mult=12|vmin=0.85|vmax=1.50|date=March 2, 2008
|sspec1=SLA8W|step1=M0|part1=HH80557PG0561M}}
{{end}}
== [[Wolfdale (microprocessor)#Wolfdale-3M|"Wolfdale-3M"]] (45 nm) ==
{{Anchor|"Wolfdale-3M" (45 nm)|Wolfdale-1M (45 nm)|Wolfdale-2M (45 nm)}}
The E5000 series and E6000 series use the same 45 nm Wolfdale-3M core as the E7000 series Core 2s, which has 3 MB L2 cache natively. 1 MB of L2 cache is disabled, for a total of 2 MB L2 cache, or twice the amount in the original Allendale Pentiums. The Wolfdale core is capable of SSE4, but it is disabled in these Pentiums. Pentium E2210 is an OEM processor based on Wolfdale-3M with only 1 MB L2 cache enabled out of the total 3 MB.
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation)
- Die size: 82 mm²
- Steppings: R0
- Based on the Penryn microarchitecture
- Part of 3MB L2 Cache Disabled
- E2210 is a Wolfdale-3M with 2MB cache disabled unlike all other E22xx, which are Allendale.
- E5000-series processors were initially known as Pentium Dual-Core, while all later processors were just Pentium.
- E6500K has unlocked multiplier, and is only available in China as limited edition.
- Models with a part number ending in "ML" support Intel VT-x.
{{cpulist|core|head}}
{{cpulist|core|section=Dual Core}}
{{cpulist|core|wolfdale|model=Pentium Dual-Core E2210|ark=36487
|l1=64KB |l2=1|fsb=800|mult=11|vmin=0.85|vmax=1.3625|date=Q2, 2009|links=1
|sspec1=SLB7N|step1=M0|part1=EU80571RG0491M
|sspec2=SLB9R|step2=R0|part2=AT80571RG0491M}}
{{cpulist|core|wolfdale|model=Pentium Dual-Core E5200|ark=37212
|l1=64KB|l2=2|fsb=800|mult=12.5|vmin=0.85|vmax=1.3625|date=August 31, 2008
|sspec1=SLAY7|step1=M0|part1=EU80571PG0602M
|sspec2=SLB9T|step2=R0|part2=AT80571PG0602M
|part3=BX80571E5200
|part4=BXC80571E5200}}
{{cpulist|core|wolfdale|model=Pentium Dual-Core E5300|ark=35300
|l1=64KB|l2=2|fsb=800|mult=13|vmin=0.85|vmax=1.3625|date=November 30, 2008
|sspec1=SLB9U|step1=R0|part1=AT80571PG0642M
|sspec2=SLGQ6|step2=R0|part2=AT80571PG0642ML
|sspec3=SLGTL|step3=R0, with VT|part3=BX80571E5300
|part4=BXC80571E5300}}
{{cpulist|core|wolfdale|model=Pentium E5400|ark=40478
|l1=64KB|l2=2|fsb=800|mult=13.5|vmin=0.85|vmax=1.3625|date=January 18, 2009
|sspec1=SLB9V|step1=R0|part1=AT80571PG0682M
|sspec2=SLGTK|step2=R0, with VT|part2=AT80571PG0682ML
|part3=BX80571E5400
|part4=BXC80571E5400}}
{{cpulist|core|wolfdale|model=Pentium E5500|ark=42800
|l1=64KB|l2=2|fsb=800|mult=14|vmin=0.85|vmax=1.3625|date=April 18, 2010
|sspec1=SLGGY|step1=R0|part1=AT80571PG0722M
|sspec2=SLGTJ|step2=R0, with VT|part2=AT80571PG0722ML
|part3=BX80571E5500
|part4=BXC80571E5500}}
{{cpulist|core|wolfdale|model=Pentium E5700|ark=42801
|l1=64KB|l2=2|fsb=800|mult=15|vmin=0.85|vmax=1.3625|date=August 8, 2010
|sspec1=SLGTH|step1=R0, with VT|part2=BX80571E5700
|part1=AT80571PG0802ML
|part3=BXC80571E5700}}
{{cpulist|core|wolfdale|model=Pentium E5800|ark=42802
|l1=64KB|l2=2|fsb=800|mult=16|vmin=0.85|vmax=1.3625|date=November 28, 2010
|sspec1=SLGTG|step1=R0, with VT|part1=AT80571PG0882ML
|part2=BX80571E5800
|part3=BXC80571E5800}}
{{cpulist|core|wolfdale|model=Pentium E6300|ark=41493
|l1=64|l2=2|fsb=1066|mult=10.5|vmin=0.85|vmax=1.3625|date=May 9, 2009
|sspec1=SLGU9|step1=R0|part1=AT80571PH0722ML
|part2=BX80571E6300}}
{{cpulist|core|wolfdale|model=Pentium E6500|ark=42805
|l1=64|l2=2|fsb=1066|mult=11|vmin=0.85|vmax=1.3625|date=August 9, 2009
|sspec1=SLGUH|step1=R0|part1=AT80571PH0772ML
|sspec2=SLGVZ|step2=R0|part2=BX80571E6500}}
{{cpulist|core|wolfdale|model=Pentium E6500K|ark=42806
|l1=64|l2=2|fsb=1066|mult=11|vmin=0.85|vmax=1.3625|date=August 9, 2009
|sspec1=SLGYP|step1=R0|part1=AT80571XH0722ML}}
{{cpulist|core|wolfdale|model=Pentium E6600|ark=42807
|l1=64|l2=2|fsb=1066|mult=11.5|vmin=0.85|vmax=1.3625|date=January 17, 2010
|sspec1=SLGUG|step1=R0|part1=AT80571PH0832ML
|part2=BX80571E6600}}
{{cpulist|core|wolfdale|model=Pentium E6700|ark=42809
|l1=64|l2=2|fsb=1066|mult=12|vmin=0.85|vmax=1.3625|date=May 30, 2010
|sspec1=SLGUF|step1=R0|part1=AT80571PH0882ML
|part2=BX80571E6700}}
{{cpulist|core|wolfdale|model=Pentium E6800|ark=42811
|L1=64|l2=2|fsb=1066|mult=12.5|vmin=0.85|vmax=1.3625|date=August 29, 2010
|sspec1=SLGUE|step1=R0|part1=BX80571E6800
|part2=AT80571PH0932ML}}
{{end}}
= Westmere based Pentiums =
==[[Clarkdale (microprocessor)|"Clarkdale"]] ([[Multi-chip package|MCP]], 32 nm)==
{{anchor|"Clarkdale" (32 nm)}}
- Note that these are also dual core, but under the Pentium brand.
- Based on Westmere microarchitecture
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache.
- Contains 45 nm "Ironlake" GPU.
- G6951 can be unlocked to enable Hyper-threading and an extra 1MB of L3 cache, which are present in the CPU but deliberately disabled, with the purchase of a $50 upgrade card by way of the Intel Upgrade Service.{{Cite web|url=http://www.tomshardware.com/news/pentium-g6951-clarkdale-upgrade-card,11320.html|title = Intel Charging $50 to Unlock CPU's Full Features|date = 21 September 2010}}
{{cpulist|nehgfx|head}}
{{cpulist|nehgfx|section=Dual Core}}
{{cpulist|nehgfx|clarkdale|model=Pentium G6950|ark=43230
|mult=21|turbo={{n/a}}|gfxclock=533|l3=3|memspeed=1066|vmin=0.65|vmax=1.4|tdp=73|date=January 7, 2010||links=1
|sspec1=SLBMS|step1=C2|part1=CM80616004593AE
|sspec2=SLBTG|step2=K0
|part2=BX80616G6950|part3=BXC80616G6950}}
{{cpulist|nehgfx|clarkdale|model=Pentium G6951|ark=43566
|mult=21|turbo={{n/a}}|gfxclock=533|l3=3|memspeed=1066|vmin=0.65|vmax=1.4|tdp=73|date=Q3 2010|
|sspec1=SLBMR|sspec2=SLBTF|step1=C2|step2=K0|part1=CM80616004593AF
|part2=BX80616G6951}}
{{cpulist|nehgfx|clarkdale|model=Pentium G6960|ark=46483
|mult=22|turbo={{n/a}}|gfxclock=533|l3=3|memspeed=1066|vmin=0.65|vmax=1.4|tdp=73|date=January 9, 2011
|sspec1=SLBT6|step1=K0|part1=CM80616005373AA
|part2=}}
{{end}}
= Sandy Bridge based Pentiums =
== "[[Sandy Bridge (microarchitecture)|Sandy Bridge]]" (32 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache.
- Pentium G8xx supports DDR3-1333 in addition to DDR3-1066.
- HD Graphics (Sandy Bridge) contain 6 EUs as well as HD Graphics 2000, but does not support the following technologies: Intel Quick Sync Video, InTru3D, Intel Clear Video HD, Wireless display, Intel insider.
- Transistors: 504 million
- Die size: 131 mm²
- The Pentium G622, once upgraded via Intel Upgrade Service, operates at 3.2 GHz, has 3 MB L3 cache and is recognized as Pentium G693.
- The Pentium G632, once upgraded via Intel Upgrade Service, operates at 3.3 GHz, has 3 MB L3 cache and is recognized as Pentium G694.
{{cpulist|bridge|head}}
{{cpulist|bridge|section=standard power}}
{{cpulist|bridge|sandybridge|model=Pentium G620|ark=53480
|cores=2|l3=3|mult=26|gfxmodel=6eu|gfxclock=850–1100||tdp=65|date=May 22, 2011|links=1
|sspec1=SR05R|step1=Q0|sock=1155|part1=CM8062301046304|part2=BX80623G620|part3=BXC80623G620}}
{{cpulist|bridge|sandybridge|model=Pentium G622|ark=53482
|cores=2|l3=3|mult=26|gfxmodel=6eu|gfxclock=850–1100||tdp=65|date=May 22, 2011
|sspec1=SR05M|step1=Q0|sock=1155|part1=CM8062301049115|part2=BX80623G622|part3=}}
{{cpulist|bridge|sandybridge|model=Pentium G630|ark=53483
|cores=2|l3=3|mult=27|gfxmodel=6eu|gfxclock=850–1100||tdp=65|date=September 4, 2011
|sspec1=SR05S|step1=Q0|sock=1155|part1=CM8062301046404|part2=BX80623G630|part3=BXC80623G630}}
{{cpulist|bridge|sandybridge|model=Pentium G632|ark=53485
|cores=2|l3=3|mult=27|gfxmodel=6eu|gfxclock=850–1100||tdp=65|date=September 4, 2011
|sspec1=SR05N|step1=Q0|sock=1155|part1=CM8062301049304|part2=|part3=}}
{{cpulist|bridge|sandybridge|model=Pentium G640|ark=53486
|cores=2|l3=3|mult=28|gfxmodel=6eu|gfxclock=850–1100||tdp=65|date=June 3, 2012
|sspec1=SR059|step1=Q0|sock=1155|part1=CM8062307260314|part2=BX80623G640|part3=BXC80623G640}}
{{cpulist|bridge|sandybridge|model=Pentium G645|ark=69116
|cores=2|l3=3|mult=29|gfxmodel=6eu|gfxclock=850–1100||tdp=65|date=September 2, 2012
|sspec1=SR0RS|step1=Q0|sock=1155|part1=CM8062301262601|part2=BX80623G645|part3=BXC80623G645}}
{{cpulist|bridge|sandybridge|model=Pentium G840|ark=53490
|cores=2|l3=3|mult=28|gfxmodel=6eu|gfxclock=850–1100|tdp=65|date=May 22, 2011
|sspec1=SR05P|step1=Q0|sock=1155|part1=CM8062301046104|part2=BX80623G840|part3=BXC80623G840}}
{{cpulist|bridge|sandybridge|model=Pentium G850|ark=53491
|cores=2|l3=3|mult=29|gfxmodel=6eu|gfxclock=850–1100|tdp=65|date=May 22, 2011
|sspec1=SR05Q|step1=Q0|sock=1155|part1=CM8062301046204|part2=BX80623G850|part3=BXC80623G850}}
{{cpulist|bridge|sandybridge|model=Pentium G860|ark=53492
|cores=2|l3=3|mult=30|gfxmodel=6eu|gfxclock=850–1100|tdp=65|date=September 4, 2011
|sspec1=SR058|step1=Q0|sock=1155|part1=CM8062307260237|part2=BX80623G860|part3=}}
{{cpulist|bridge|sandybridge|model=Pentium G870|ark=53493
|cores=2|l3=3|mult=31|gfxmodel=6eu|gfxclock=850–1100|tdp=65|date=June 3, 2012
|sspec1=SR057|step1=Q0|sock=1155|part1=CM8062307260115|part2=BX80623G870|part3=}}
{{cpulist|bridge|section= ultra low power}}
{{cpulist|bridge|sandybridge|model=Pentium G620T|ark=53481
|cores=2|l3=3|mult=22|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=May 22, 2011
|sspec1=SR05T|step1=Q0|sock=1155|part1=CM8062301046504|part2=BX80623G620T|part3=BXC80623G620T}}
{{cpulist|bridge|sandybridge|model=Pentium G630T|ark=53484
|cores=2|l3=3|mult=23|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=September 4, 2011
|sspec1=SR05U|step1=Q0|sock=1155|part1=CM8062301046604|part2=BX80623G630T|part3=}}
{{cpulist|bridge|sandybridge|model=Pentium G640T|ark=53487
|cores=2|l3=3|mult=24|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=June 3, 2012
|sspec1=SR066|step1=Q0|sock=1155|part1=CM8062301002204|part2=BX80623G640T|part3=}}
{{cpulist|bridge|sandybridge|model=Pentium G645T|ark=69364
|cores=2|l3=3|mult=25|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=September 2, 2012
|sspec1=SR0S0|step1=Q0|sock=1155|part1=CM8062301263701|part2=|part3=}}
{{cpulist|bridge|sandybridge|model=Pentium G860T|ark=67020
|cores=2|l3=3|mult=26|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=June 3, 2012
|sspec1=SR0MF|step1=Q0|sock=1155|part1=CM8062301198300|part2=|part3=}}
{{end}}
= Ivy Bridge based Pentiums =
== "[[Ivy Bridge (microarchitecture)|Ivy Bridge]]" (22 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache.
- G20xx support up to DDR3-1333 memory while G21xx support up to DDR3-1600.
- HD Graphics (Ivy Bridge) contain 6 EUs as well as HD Graphics 2500, but does not support the following technologies: Intel Quick Sync Video, InTru3D, Intel Clear Video HD, Wireless display, Intel insider.
{{cpulist|bridge|head}}
{{cpulist|bridge|section=standard power}}
{{cpulist|bridge|ivybridge|model=Pentium G2010|ark=71071
|cores=2|l3=3|mult=28|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=55|date=January 20, 2013|links=1
|sspec1=SR10J|step1=P0|sock1=LGA 1155|part1=CM8063701444800|part2=BX80637G2010|part3=BXC80637G2010}}
{{cpulist|bridge|ivybridge|model=Pentium G2020|ark=71070
|cores=2|l3=3|mult=29|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=55|date=January 20, 2013|
|sspec1=SR10H|step1=P0|sock1=LGA 1155|part1=CM8063701444700|part2=BX80637G2020|part3=BXC80637G2020}}
{{cpulist|bridge|ivybridge|model=Pentium G2030|ark=74749
|cores=2|l3=3|mult=30|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=55|date=June 9, 2013|
|sspec1=SR163|step1=P0|sock1=LGA 1155|part1=CM8063701450000|part2=BX80637G2030|part3=BXC80637G2030}}
{{cpulist|bridge|ivybridge|model=Pentium G2120|ark=65527
|cores=2|l3=3|mult=31|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=55|date=September 2, 2012|
|sspec1=SR0UF|step1=P0|sock1=LGA 1155|part1=CM8063701095801|part2=BX80637G2120|part3=BXC80637G2120}}
{{cpulist|bridge|ivybridge|model=Pentium G2130|ark=71052
|cores=2|l3=3|mult=32|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=55|date=January 20, 2013|
|sspec1=SR0YU|step1=P0|sock1=LGA 1155|part1=CM8063701391200|part2=BX80637G2130|part3=BXC80637G2130}}
{{cpulist|bridge|ivybridge|model=Pentium G2140|ark=74747
|cores=2|l3=3|mult=33|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=55|date=June 9, 2013|
|sspec1=SR0YT|step1=P0|sock1=LGA 1155|part1=CM8063701391100|part2=BX80637G2140|part3=BXC80637G2140}}
{{cpulist|bridge|section=low power}}
{{cpulist|bridge|ivybridge|model=Pentium G2020T|ark=71069
|cores=2|l3=3|mult=25|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=35|date=January 20, 2013
|sspec1=SR10G|step1=P0|sock1=LGA 1155|part1=CM8063701444601}}
{{cpulist|bridge|ivybridge|model=Pentium G2030T|ark=74748
|cores=2|l3=3|mult=26|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=35|date=June 9, 2013
|sspec1=SR164|step1=P0|sock1=LGA 1155|part1=CM8063701450500}}
{{cpulist|bridge|ivybridge|model=Pentium G2100T|ark=65738
|cores=2|l3=3|mult=26|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=35|date=September 2, 2012
|sspec1=SR0UJ|step1=P0|sock1=LGA 1155|part1=CM8063701219000}}
{{cpulist|bridge|ivybridge|model=Pentium G2120T|ark=71097
|cores=2|l3=3|mult=27|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1050|tdp=35|date=June 9, 2013
|sspec1=SR0YV|step1=P0|sock1=LGA 1155|part1=CM8063701391600}}
{{end}}
= Haswell based Pentiums =
== "[[Haswell (microarchitecture)|Haswell-DT]]" (22 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache.
- G32xx support up to DDR3-1333 memory while G34xx support up to DDR3-1600.
- G3258 (Pentium anniversary edition) has unlocked CPU multiplier.
- Haswell Pentiums support Quick Sync Video.{{cite web |url=http://downloadmirror.intel.com/23884/eng/ReleaseNotes_GFX_32.pdf |title=Release Notes Driver version: 15.33.22.3621 |date=2014-05-21 |access-date=2019-03-23}}
- Transistors: 1.4 billion
- Die size: 177mm²
{{cpulist|haswell|head}}
{{cpulist|haswell|section=standard power}}
{{cpulist|haswell|haswell|model=Pentium G3220|ark=77773
|cores=2|l3=3|mult=30|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=September 2013|links=1
|sspec1=SR1CG|sspec2=SR1RK|step1=C0|step2=C0|sock=1150|part1=CM8064601482519|part2=CM8064601562017|part3=BX80646G3220|part4=BXC80646G3220}}
{{cpulist|haswell|haswell|model=Pentium G3240|ark=80796
|cores=2|l3=3|mult=31|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=May 2014|sspec1=SR1K6|sspec2=SR1RL|step1=C0|step2=C0|sock=1150|part1=CM8064601482507|part2=CM8064601562018|part3=BX80646G3240|part4=BXC80646G3240}}
{{cpulist|haswell|haswell|model=Pentium G3250|ark=83538
|cores=2|l3=3|mult=32|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=July 2014|sspec1=SR1K7|step1=C0|sock=1150|part1=CM8064601482514|part2=BX80646G3250|part3=BXC80646G3250}}
{{cpulist|haswell|haswell|model=Pentium G3258|ark=82723
|cores=2|l3=3|mult=32|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=June 2014|sspec1=SR1V0|step1=C0|sock=1150|part1=CM8064601482573|part2=BX80646G3258|part3=BXC80646G3258}}
{{cpulist|haswell|haswell|model=Pentium G3260|ark=87356
|cores=2|l3=3|mult=33|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=March 2015| sspec1=SR1K8|step1=C0|sock=1150|part1=CM8064601482506|part2=BX80646G3260|part3=BXC80646G3260}}
{{cpulist|haswell|haswell|model=Pentium G3420|ark=77775
|cores=2|l3=3|mult=32|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1150|tdp=53|date=September 2013|
|sspec1=SR1NB|step1=C0|sock=1150|part1=CM8064601482522|part2=BX80646G3420|part3=BXC80646G3420}}
{{cpulist|haswell|haswell|model=Pentium G3430|ark=77777
|cores=2|l3=3|mult=33|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=September 2013|
|sspec1=SR1CE|step1=C0|sock=1150|part1=CM8064601482518|part2=BX80646G3430|part3=BXC80646G3430}}
{{cpulist|haswell|haswell|model=Pentium G3440|ark=80794
|cores=2|l3=3|mult=33|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=May 2014|sspec1=SR1P9|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601482563|part2=BX80646G3440|part3=}}
{{cpulist|haswell|haswell|model=Pentium G3450|ark=80792
|cores=2|l3=3|mult=34|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=May 2014|sspec1=SR1K2|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601482505|part2=BX80646G3450|part3=}}
{{cpulist|haswell|haswell|model=Pentium G3460|ark=83428
|cores=2|l3=3|mult=35|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=July 2014|sspec1=SR1K3|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601482508|part2=BX80646G3460|part3=}}
{{cpulist|haswell|haswell|model=Pentium G3470|ark=87358
|cores=2|l3=3|mult=36|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1100|tdp=53|date=March 2015|sspec1=SR1K4|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601482520|part2=BX80646G3470|part3=}}
{{cpulist|bridge|section=low power}}
{{cpulist|haswell|haswell|model=Pentium G3220T|ark=77774
|cores=2|l3=3|mult=26|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1100|tdp=35|date=September 2013|
|sspec1=SR1CL|step1=C0|sock=1150|part1=CM8064601483713}}
{{cpulist|haswell|haswell|model=Pentium G3240T|ark=80797
|cores=2|l3=3|mult=27|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1100|tdp=35|date=May 2014|links=|sspec1=SR1KU|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601483722|part2=|part3=}}
{{cpulist|haswell|haswell|model=Pentium G3250T|ark=83539
|cores=2|l3=3|mult=28|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1100|tdp=35|date=July 2014|links=|sspec1=SR1KV|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601483718|part2=|part3=}}
{{cpulist|haswell|haswell|model=Pentium G3260T|ark=87357
|cores=2|l3=3|mult=29|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1100|tdp=35|date=March 2015|links=|sspec1=SR1KW|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601483744|part2=|part3=}}
{{cpulist|haswell|haswell|model=Pentium G3420T|ark=77776
|cores=2|l3=3|mult=27|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1100|tdp=35|date=September 2013|
|sspec1=SR1CK|step1=C0|sock=1150|part1=CM8064601483712}}
{{cpulist|haswell|haswell|model=Pentium G3440T|ark=80795
|cores=2|l3=3|mult=28|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1100|tdp=35|date=May 2014|links=|sspec1=SR1KS|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601483717|part2=|part3=}}
{{cpulist|haswell|haswell|model=Pentium G3450T|ark=80793
|cores=2|l3=3|mult=29|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1100|tdp=35|date=July 2014|links=|sspec1=SR1KT|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601483714|part2=|part3=}}
{{cpulist|haswell|haswell|model=Pentium G3460T|ark=83429
|cores=2|l3=3|mult=30|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1100|tdp=35|date=March 2015|links=|sspec1=SR1TD|sspec2=|step1=C0|step2=|sock=1150|part1=CM8064601483760|part2=|part3=}}
{{cpulist|haswell|section=low power, embedded}}
{{cpulist|haswell|haswell|model=Pentium G3320TE|ark=78007
|cores=2|l3=3|mult=23|turbo={{n/a}}|gfxmodel=10eu|gfxclock=350–1000|tdp=35|date=September 2013|
|sspec1=SR181|step1=C0|sock=1150|part1=CM8064601484501}}
{{end}}
= Silvermont based Pentiums =
=="[[Silvermont|Bay Trail-D]]" (22 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, Intel VT-x.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Ivy Bridge Intel HD Graphics, with 4 execution units, and supports DirectX 11, OpenGL 4.0, OpenGL ES 3.0 and OpenCL 1.1 (on Windows). J2900 supports Intel Quick Sync Video.
- Package size: 25 mm × 27 mm
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium J2850|ark=76529|cores=4|mult=29|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=688-792|tdp=10|sdp=|sock1=FC-BGA 1170|date=September 2013|links=1
|sspec1=SR1LM|sspec2=SR1H4|step1=B2|step2=B2|part1=FH8065301455104}}
{{cpulist|silvermont|baytrail|model=Pentium J2900|ark=78868|cores=4|mult=29|burst=2.67|gfxmodel=4eu|mem=2 × DDR3L-1333
|gfxclock=688-896|tdp=10|sdp=|sock1=FC-BGA 1170|date=November 2013
|sspec1=SR1SB|step1=B3|part1=FH8065301614903
|sspec2=SR1US|step2=C0|part2=FH8065301614904}}
{{end}}
= Airmont based Pentiums =
=="[[Silvermont|Braswell]]" (14 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, AES-NI.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Broadwell Intel HD Graphics, with 18 execution units, and supports DirectX 11.2, OpenGL 4.4, OpenGL ES 3.0 and OpenCL 2.0 (on Windows).
- Package size: 25 mm × 27 mm
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium J3710|ark=91532|cores=4|mult=19.2|burst=2.64|gfxmodel=405
|gfxclock=400-740|l2=2|mem=2 × DDR3L-1600|vmin=0.4|vmax=1.14|tdp=6.5|sdp=|sock1=FC-BGA 1170|date=January 2016|links=1
|sspec1=SR2KQ|step1=D1|part1=FH8066501715931}}
{{end}}
= Skylake based Pentiums =
== "[[Skylake (microarchitecture)|Skylake-S]]" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Smart Cache.
- All models support up to DDR3-1600 or DDR4-2133 memory.
- Embedded models support ECC memory.
- Transistors: TBD
- Package size: 37.5 mm x 37.5mm
{{cpulist|skylake|head}}
{{cpulist|skylake|section=standard power}}
{{cpulist|skylake|skylake|model=Pentium G4400|ark=88179
|cores=2|threads=2|l3=3|mult=33|turbo={{n/a}}|gfxmodel=510|gfxclock=350–1000|tdp=54|date=September 2015|links=1
|sspec1=SR2DC|step1=R0|sock=1151|part1=BX80662G4400|part2=BXC80662G4400|part3=CM8066201927306}}
{{cpulist|skylake|skylake|model=Pentium G4500|ark=90730
|cores=2|threads=2|l3=3|mult=35|turbo={{n/a}}|gfxmodel=530|gfxclock=350–1050|tdp=51|date=September 2015
|sspec1=SR2HJ|step1=S0|sock=1151|part1=BX80662G4500|part2=BXC80662G4500|part3=CM8066201927319}}
{{cpulist|skylake|skylake|model=Pentium G4520|ark=90732
|cores=2|threads=2|l3=3|mult=36|turbo={{n/a}}|gfxmodel=530|gfxclock=350–1050|tdp=51|date=September 2015
|sspec1=SR2HM|step1=S0|sock=1151|part1=BX80662G4520|part2=CM8066201927407}}
{{cpulist|skylake|section=low power}}
{{cpulist|skylake|skylake|model=Pentium G4400T|ark=90614
|cores=2|threads=2|l3=3|mult=29|turbo={{n/a}}|gfxmodel=510|gfxclock=350–950|tdp=35|date=September 2015
|sspec1=SR2HQ|step1=S0|sock=1151|part1=CM8066201927506|part2=}}
{{cpulist|skylake|skylake|model=Pentium G4500T|ark=90725
|cores=2|threads=2|l3=3|mult=30|turbo={{n/a}}|gfxmodel=530|gfxclock=350–950|tdp=35|date=September 2015
|sspec1=SR2HS|step1=S0|sock=1151|part1=CM8066201927512|part2=}}
{{cpulist|skylake|section=low power, embedded}}
{{cpulist|skylake|skylake|model=Pentium G4400TE|ark=90610
|cores=2|threads=2|l3=3|mult=24|turbo={{n/a}}|gfxmodel=510|gfxclock=350–950|tdp=35|date=December 2015
|sspec1=SR2LT|step1=R0|sock=1151|part1=CM8066201938702|part2=}}
{{end}}
= Goldmont based Pentiums =
=="[[Goldmont|Apollo Lake]]" (14 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, AES-NI. TXT/TXE
- Package size: 24 mm × 31 mm
- DDR3L/LPDDR3/LPDDR4 dual-channel memory controller supporting up to 8 GB
- Display controller with 1 MIPI DSI port and 2 DDI ports (eDP 1.3, DP 1.1a, or HDMI 1.4b)
- Integrated Intel HD Graphics (Gen9) GPU
- PCI Express 2.0 controller supporting 6 lanes (3 dedicated and 3 multiplexed with USB 3.0); 4 lanes available externally
- Two USB 3.0 ports (1 dual role, 1 dedicated, 3 multiplexed with PCI Express 2.0 and 1 multiplexed with one SATA-300 port)
- Two USB 2.0 ports
- Two SATA-600 ports (one multiplexed with USB 3.0)
- Integrated HD audio controller
- Integrated image signal processor supporting four MIPI CSI ports and 13 MP sensors
- Integrated memory card reader supporting SDIO 3.01 and eMMC 5.0
- Serial I/O supporting SPI, HSUART (serial port) and I2C
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium J4205|ark=95591|cores=4|mult=18|burst=2.6|gfxmodel=505
|gfxclock=250-800|l2=2|mem=2 × DDR3L-1866
2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1296|date=September 2016|links=1
|sspec1=SR2ZA|step1=B1|part1=FH8066802986200}}
{{end}}
= Goldmont Plus based Pentiums =
=="[[Goldmont Plus|Gemini Lake]]" (14 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Intel SGX.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Kaby Lake Intel HD Graphics, with 18 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 2.0 (on Windows).
- Package size: 25 mm × 24 mm
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium Silver J5005|ark=128984|cores=4|mult=18|burst=2.8|gfxmodel=605
|gfxclock=250-800|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1090|date=December 2017|links=1
|sspec1=SR3S3|step1=B0|part1=FH8068003067415}}
{{end}}
=="[[Goldmont Plus|Gemini Lake Refresh]]" (14 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Intel SGX.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Kaby Lake Intel HD Graphics, with 18 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 2.0 (on Windows).
- Package size: 25 mm × 24 mm
{{cpulist|silvermont|head}}50
{{cpulist|silvermont|baytrail|model=Pentium Silver J5040|ark=197304|cores=4|mult=24|burst=3.2|gfxmodel=605
|gfxclock=250-800|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=10|sdp=|sock1=FC-BGA 1090|date=November 2019
|sspec1=SRFDB|step1=R0|part1=FH8068003067443}}
{{end}}
= Kaby Lake based Pentiums =
== "[[Kaby Lake|Kaby Lake-S]]" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SGX, MPX, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, Hyper-threading, AES-NI, Smart Cache, ECC memory.
- All models support up to DDR3-1600 or DDR4-2400 memory.
- Low power models also support configurable TDP (cTDP) down.
- Transistors: TBD
- Package size: 37.5 mm x 37.5mm
{{cpulist|skylake|head}}
{{cpulist|skylake|section=standard power}}
{{cpulist|skylake|skylake|model=Pentium G4560|ark=97143
|cores=2|threads=4|l3=3|mult=35|turbo={{n/a}}|gfxmodel=610|gfxclock=350–1050|tdp=54|date=January 2017|links=1
|sspec1=SR32Y|step1=B0|sock=1151|part1=BX80677G4560|part2=BXC80677G4560|part3=}}
{{cpulist|skylake|skylake|model=Pentium G4600|ark=97453
|cores=2|threads=4|l3=3|mult=36|turbo={{n/a}}|gfxmodel=630|gfxclock=350–1100|tdp=51|date=January 2017
|sspec1=SR35F|step1=S0|sock=1151|part1=BX80677G4600|part2=BXC80677G4600|part3=}}
{{cpulist|skylake|skylake|model=Pentium G4620|ark=97460
|cores=2|threads=4|l3=3|mult=37|turbo={{n/a}}|gfxmodel=630|gfxclock=350–1100|tdp=51|date=January 2017
|sspec1=SR35E|step1=S0|sock=1151|part1=BX80677G4620|part2=}}
{{cpulist|skylake|section=low power}}
{{cpulist|skylake|skylake|model=Pentium G4560T|ark=97465
|cores=2|threads=4|l3=3|mult=29|turbo={{n/a}}|gfxmodel=610|gfxclock=350–1050|tdp=35|date=January 2017
|sspec1=SR35T|step1=S0|sock=1151|part1=CM8067703016117|part2=}}
{{cpulist|skylake|skylake|model=Pentium G4600T|ark=97486
|cores=2|threads=4|l3=3|mult=30|turbo={{n/a}}|gfxmodel=630|gfxclock=350–1050|tdp=35|date=January 2017
|sspec1=SR35R|step1=S0|sock=1151|part1=CM8067703016014|part2=}}
{{end}}
= Coffee Lake based Pentiums =
== "Coffee Lake-S" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SGX, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, Hyper-threading, AES-NI, Smart Cache, ECC memory.
- All models support up to DDR4-2400 memory.
- Low power models also support configurable TDP (cTDP) down.
- Transistors: TBD
- Package size: 37.5 mm x 37.5mm
{{cpulist|skylake|head}}
{{cpulist|skylake|section=Standard power}}
{{cpulist|skylake|skylake|model=Pentium Gold G5400|ark=129951|cores=2|threads=4|l3=4|mult=37|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=54|date=April 2018|sspec1=SR3X9|step1=U0|sock=1151|part1=CM8068403360112|part2=BX80684G5400|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G5420|ark=135456|cores=2|threads=4|l3=4|mult=38|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=54|date=April 2019|sspec1=SR3YH|sspec2=SR3XA|step1=B0|step2=U0|sock=1151|part1=CM8068403360113|part2=BX80684G5420|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G5500|ark=129946|cores=2|threads=4|l3=4|mult=38|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1100|tdp=54|date=April 2018|sspec1=SR3YD|step1=B0|sock=1151|part1=CM8068403377611|part2=BX80684G5500|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G5600|ark=129945|cores=2|threads=4|l3=4|mult=39|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1100|tdp=54|date=April 2018|sspec1=SR3YB|step1=B0|sock=1151|part1=CM8068403377513|part2=BX80684G5600|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G5620|ark=135457|cores=2|threads=4|l3=4|mult=40|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1100|tdp=54|date=April 2019|sspec1=SR3YC|step1=B0|sock=1151|part1=BX80684G5620|part2=BXC80684G5620|part3=}}
{{cpulist|skylake|section=Low power}}
{{cpulist|skylake|skylake|model=Pentium Gold G5400T|ark=129949|cores=2|threads=4|l3=4|mult=31|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=35|date=April 2018|sspec1=SR3XB|step1=U0|sock=1151|part1=CM8068403360212|part2=|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G5420T|ark=135455|cores=2|threads=4|l3=4|mult=32|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=35|date=April 2019|sspec1=SR3XC|step1=U0|sock=1151|part1=CM8068403360213|part2=|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G5500T|ark=129947|cores=2|threads=4|l3=4|mult=32|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1050|tdp=35|date=April 2018|sspec1=SR3YE|step1=B0|sock=1151|part1=CM8068403377713|part2=|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G5600T|ark=135109|cores=2|threads=4|l3=4|mult=33|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1050|tdp=35|date=April 2019|sspec1=SR3YF|step1=B0|sock=1151|part1=CM8068403377714|part2=|part3=}}
{{end}}
== "Coffee Lake-H" (14 nm) ==
{{cpulist|skylake|head}}
{{cpulist|skylake|section=Embedded}}
{{cpulist|skylake|skylake|model=Pentium Gold G5600E|ark=195326|cores=2|threads=2|l3=4|mult=26|turbo=3.1 GHz|gfxmodel=U630|gfxclock=350–1050|tdp=35|date=June 2019|sspec1=SRFEF|step1=U0|sock=1440|part1=CL8068404165000|part2=|part3=}}
{{end}}
= Comet Lake based Pentiums =
== "Comet Lake-S" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SGX, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, Hyper-threading, AES-NI, Smart Cache.
- All models support up to DDR4-2666 memory.
- Low power models also support configurable TDP (cTDP) down.
- Transistors: TBD
- Package size: 37.5 mm x 37.5mm
{{cpulist|skylake|head}}
{{cpulist|skylake|section=Standard power}}
{{cpulist|skylake|skylake|model=Pentium Gold G6400|ark=199288|cores=2|threads=4|l3=4|mult=40|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=58|date=April 2020|sspec1=SRH3Y|step1=G1|sock=1200|part1=CM8070104291810|part2=BX80701G6400|part3=BXC80701G6400}}
{{cpulist|skylake|skylake|model=Pentium Gold G6405|ark=201901|cores=2|threads=4|l3=4|mult=41|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=58|date=March 2021|sspec1=SRH3Z|step1=G1|sock=1200|part1=CM8070104291811|part2=BX80701G6405|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G6500|ark=199287|cores=2|threads=4|l3=4|mult=41|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1100|tdp=58|date=April 2020|sspec1=SRH3U|step1=G1|sock=1200|part1=CM8070104291610|part2=BX80701G6500|part3=BXC80701G6500}}
{{cpulist|skylake|skylake|model=Pentium Gold G6505|ark=201902|cores=2|threads=4|l3=4|mult=42|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1100|tdp=58|date=March 2021|sspec1=SRH3V|step1=G1|sock=1200|part1=CM8070104291611|part2=|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G6600|ark=199285|cores=2|threads=4|l3=4|mult=42|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1100|tdp=58|date=April 2020|sspec1=SRH3S|step1=G1|sock=1200|part1=CM8070104291510|part2=BX80701G6600|part3=BXC80701G6600}}
{{cpulist|skylake|skylake|model=Pentium Gold G6605|ark=201904|cores=2|threads=4|l3=4|mult=43|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1100|tdp=58|date=March 2021|sspec1=SRH3T|step1=G1|sock=1200|part1=CM8070104291511|part2=BX80701G6605|part3=}}
{{cpulist|skylake|section=Standard power, embedded}}
{{cpulist|skylake|skylake|model=Pentium Gold G6400E|ark=203896|cores=2|threads=4|l3=4|mult=38|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=58|date=April 2020|sspec1=SRH6G|step1=G1|sock=1200|part1=CM8070104423809|part2=|part3=}}
{{cpulist|skylake|section=Low power}}
{{cpulist|skylake|skylake|model=Pentium Gold G6400T|ark=199289|cores=2|threads=4|l3=4|mult=34|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=35|date=April 2020|sspec1=SRH40|step1=G1|sock=1200|part1=CM8070104291907|part2=|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G6405T|ark=201900|cores=2|threads=4|l3=4|mult=35|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=35|date=March 2021|sspec1=SRH41|step1=G1|sock=1200|part1=CM8070104291909|part2=|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G6500T|ark=199286|cores=2|threads=4|l3=4|mult=35|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1050|tdp=35|date=April 2020|sspec1=SRH3W|step1=G1|sock=1200|part1=CM8070104291707|part2=|part3=}}
{{cpulist|skylake|skylake|model=Pentium Gold G6505T|ark=201903|cores=2|threads=4|l3=4|mult=36|turbo={{n/a}}|gfxmodel=U630|gfxclock=350–1050|tdp=35|date=March 2021|sspec1=SRH3X|step1=G1|sock=1200|part1=CM8070104291709|part2=|part3=}}
{{cpulist|skylake|section=Low power, embedded}}
{{cpulist|skylake|skylake|model=Pentium Gold G6400TE|ark=203894|cores=2|threads=4|l3=4|mult=32|turbo={{n/a}}|gfxmodel=U610|gfxclock=350–1050|tdp=35|date=April 2020|sspec1=SRH6H|step1=G1|sock=1200|part1=CM8070104423912|part2=|part3=}}
{{end}}
=[[Golden Cove]] based Pentiums =
=="[[Alder Lake]]" (Intel 7)==
- All models support: SSE4.1, SSE4.2, AVX, AVX2, FMA3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, Hyper-threading, AES-NI, Smart Cache, DL Boost, GNA 3.0, and Optane memory.
- All models support up to DDR5-4800 or DDR4-3200 memory, and 16 lanes of PCI Express 5.0 + 4 lanes of PCIe 4.0.
class="wikitable"
! rowspan=2 | Model ! rowspan=2 | Cores ! rowspan=2 | Freq. ! rowspan=2 | Turbo ! rowspan=2 | L2 ! rowspan=2 | L3 ! rowspan=2 | GPU ! rowspan=2 | GPU ! colspan=2 | Power ! rowspan=2 | Socket ! rowspan=2 | I/O bus ! rowspan=2 style="text-align:right;" {{!}} Release date ! rowspan=2 | sSpec ! rowspan=2 | Part |
Base
! Max |
---|
align="left" colspan=20 style="background:#127cc1;color: white" | Standard power |
[https://ark.intel.com/content/www/us/en/ark/products/219435.html Pentium Gold G7400]
| 2 (4) | 3.7 GHz | {{n/a}} | {{nobreak|2 × 1.25}} MB | 6 MB | UHD 710 | 300–1350 MHz | 46 W | {{n/a}} | LGA 1700 | style="text-align:right;" | January 2022 | SRL66 (H0) | CM8071504651605 |
align="left" colspan=20 style="background:#127cc1;color: white" | Standard power, embedded |
[https://ark.intel.com/content/www/us/en/ark/products/196311.html Pentium Gold G7400E]
| 2 (4) | 3.6 GHz | {{n/a}} | {{nobreak|2 × 1.25}} MB | 6 MB | UHD 710 | 300–1350 MHz | 46 W | {{n/a}} | LGA 1700 | DMI 4.0 ×8 | style="text-align:right;" | January 2022 | SRL6R (H0) | CM8071504653907 |
align="left" colspan=20 style="background:#127cc1;color: white" | Low power |
[https://ark.intel.com/content/www/us/en/ark/products/219436.html Pentium Gold G7400T]
| 2 (4) | 3.1 GHz | {{n/a}} | {{nobreak|2 × 1.25}} MB | 6 MB | UHD 710 | 300–1350 MHz | 35 W | {{n/a}} | LGA 1700 | DMI 4.0 ×8 | style="text-align:right;" | January 2022 | SRL65 (H0) | CM8071504651504 |
align="left" colspan=20 style="background:#127cc1;color: white" | Low power, embedded |
[https://ark.intel.com/content/www/us/en/ark/products/196312.html Pentium Gold G7400TE]
| 2 (4) | 3.0 GHz | {{n/a}} | {{nobreak|2 × 1.25}} MB | 6 MB | UHD 710 | 300–1350 MHz | 35 W | {{n/a}} | LGA 1700 | DMI 4.0 ×8 | style="text-align:right;" | January 2022 | SRL6S (H0) | CM8071504654005 |
Mobile processors
= P5 based Pentiums =
== "P54C" (600 nm) ==
- Based on P5 microarchitecture
{{cpulist|p5|head}}
{{cpulist|p5|p54c|model=Mobile Pentium 75
|l1=16|fsb=50|mult=1.5|volt=3.3 V|tdp=6/4.4|date=|links=1
|sspec=SK091 (mA1), SK122 (mA4), SK079 (C2), SK089 (mA1), SK119 (mA4), SX951 (B3), SX975 (B5), SY009 (E0), SY056 (mcC0)
|part1=A8050275|part2=TT8050275|part3=TT80502-75}}
{{cpulist|p5|p54c|model=Mobile Pentium 90
|l1=16|fsb=60|mult=1.5|volt=3.3 V|tdp=7.3|date=
|sspec=SK092 (mA1), SK123 (mA4), SK090 (mA1), SK120 (mA4)
|sock1=Socket 7|sock2=TCP320
|part1=A8050290|part2=TT8050290}}
{{cpulist|p5|p54c|model=Mobile Pentium 100
|l1=16|fsb=66|mult=1.5|volt=3.3 V|tdp=8/5.9|date=
|sspec=SK124 (mA4), SY046 (mcC0), SK121 (mA4), SY020 (mcC0), SY029 (mcB1)
|sock1=Socket 7|sock2=TCP320
|part1=A80502100|part2=TT80502100}}
{{end}}
== "P54LM" (350 nm) ==
- Based on P5 microarchitecture
{{cpulist|p5|head}}
{{cpulist|p5|p54lm|model=Mobile Pentium 120
|l1=16|fsb=60|mult=2|vmin=Core=2.9 I/O=3.3|vmax=|tdp=7.1 (Max.10.87)|date=|links=1
|sspec=SX999 (mcB1), SY027 (mcC0), SY030 (mcC0), SK113 (mcB1), SK118 (mcB1), SY021 (mcC0)
|part1=A80502120|part2=TT80502120}}
{{cpulist|p5|p54lm|model=Mobile Pentium 133
|l1=16|fsb=66|mult=2|vmin=Core=2.9 (3.1 SY028) I/O=3.3|vmax=|tdp=7.9 (Max.11.7 SY019 12.25 SY028 )|date=
|sspec=SY028 (mcC0)This processor was also offered as an embedded microprocessor with Voltage Reduction Technology, SY019 (mcC0)
|part1=A80502133|part2=TT80502133}}
{{cpulist|p5|p54lm|model=Mobile Pentium 150
|l1=16|fsb=60|mult=2.5|vmin=Core=3.1 I/O=3.3|vmax=|tdp=10 (Max.14.0)|date=
|sspec=SY058 (mcC0), SY043 (mcC0), SY061 (mcC0)
|sock1=Socket 7|sock2=TCP320
|part1=A80502150|part2=TT80502150}}
{{end}}
== "P55LM" (350 nm) ==
- Based on P5 microarchitecture
{{cpulist|p5|head}}
{{cpulist|p5|p55lm|model=Mobile Pentium MMX 120|l1=32|fsb=60|mult=2|volt=2.2 V|tdp=4.2|date=October 20, 1997|links=1
|sspec=SL2JS (mxB1)
|sock1=TCP320
|part1=TT80503120}}
{{cpulist|p5|p55lm|model=Mobile Pentium MMX 133
|l1=32|fsb=66|mult=2|vmin=3.135|vmax=3.465|tdp=7.8|date=May 19, 1997
|sspec=SL27C (mxB1), SL26W, SL27D (mxB1), SL27E
|sock1=Socket 7|sock2=TCP320
|part1=FV80503133|part2=TT80503133}}
{{cpulist|p5|p55lm|model=Mobile Pentium MMX 150
|l1=32|fsb=60|mult=2.5|vmin=3.135|vmax=3.6|tdp=8.6|date=January 8, 1997
|sspec=SL246 (mxA3), SL27B (mxB1), SL22G (mxA3), SL26S, SL26U (mxB1)
|sock1=Socket 7|sock2=TCP320
|part1=FV80503150|part2=TT80503150}}
{{cpulist|p5|p55lm|model=Mobile Pentium MMX 166
|l1=32|fsb=66|mult=2.5|vmin=3.135|vmax=3.6|tdp=9|date=January 8, 1997
|sspec=SL23Z (mxA3), SL27A (mxB1), SL22F (mxA3), SL26R, SL26T (mxB1)
|sock1=Socket 7|sock2=TCP320
|part1=FV80503166|part2=TT80503166}}
{{end}}
== "Tillamook" (250 nm) ==
- Based on P5 microarchitecture
{{cpulist|p5|head}}
{{cpulist|p5|tillamook|model=Mobile Pentium MMX 166|l1=32|fsb=66|mult=2.5|vmin=Core=1.8 I/O=2.5 |vmax=|tdp=2.9 (Max.4.1~5.4)|date=January 12, 1998|links=1
|sspec=SL2N6 (myA0)
|sock1=TCP320
|part1=TT80503166}}
{{cpulist|p5|tillamook|model=Mobile Pentium MMX 200|l1=32|fsb=66|mult=3|vmin=Core=1.8 I/O=2.5|vmax=|tdp=3.4 (Max.5.0~6.1)|date=September 8, 1997
|sspec=SL2WK (mxB1), SL28P (myA0)
|sock1=Socket 7|sock2=TCP320
|part1=FV80503200|part2=TT80503200}}
{{cpulist|p5|tillamook|model=Mobile Pentium MMX 233
|l1=32|fsb=66|mult=3.5|vmin=Core=1.8 I/O=2.5|vmax=|tdp=3.9 (Max.5.5~7.0)|date=September 8, 1997
|sspec=SL2Z3, SL28Q (myA0)
|sock1=Socket 7|sock2=TCP320
|part1=FV80503233|part2=TT80503233}}
{{cpulist|p5|tillamook|model=Mobile Pentium MMX 266|ark=49968|l1=32|fsb=66|mult=4|vmin=Core=2.0 I/O=2.5|vmax=|tdp=5.3 (Max.7,6~9.6)|date=January 12, 1998
|sspec=SL23M (myB2), SL23P (myB2), SL2N5 (myA0), SL2ZH (myA0)
|sock1=TCP320
|part1=TT80503266}}
{{cpulist|p5|tillamook|model=Mobile Pentium MMX 300|ark=49969
|l1=32|fsb=66|mult=4.5|vmin=Core=2.0 I/O=2.5|vmax=|tdp=8.0|date=January 7, 1999
|sspec=SL34N (myB2)
|sock1=TCP320
|part1=TT80503300}}
{{cpulist|p5|tillamook|model=Embedded Pentium MMX 166
|l1=32|fsb=66|mult=2.5|vmin=Core=1.9 I/O=2.5|vmax=|tdp=4.1 (Max.6.1)|date=October 13, 1998|links=1
|sspec=SL2ZX (myA0), SL388 (myA0), SL3B8
|sock1=Socket 7|sock2=HL-PBGA352
|part1=FV80503166|part2=GC80503CSM}}
{{cpulist|p5|tillamook|model=Embedded Pentium MMX 266
|l1=32|fsb=66|mult=4|vmin=Core=1.9 I/O=2.5|vmax=|tdp=7.6 (Max.9.16)|date=October 13, 1998
|sspec=SL2Z4 (myA0), SL389 (myA0)
|sock1=Socket 7|sock2=HL-PBGA352
|part1=FV80503266|part2=GC80503CSM}}
{{end}}
= P6 based Pentiums =
{{Main|List of Intel Pentium II processors|List of Intel Pentium III processors|List of Intel Pentium M processors}}
Mobile processors based on the P6 microarchitecture were marketed as Pentium II, Pentium III, Pentium M and Pentium Dual-Core, as well as variations of these names.
= NetBurst based Pentiums =
{{Main|List of Intel Pentium 4 processors}}
Mobile processors based on the NetBurst microarchitecture were marketed as Pentium 4.
= Core based Pentiums =
Prior mobile processors based on the Core microarchitecture were marketed as Pentium Dual-Core, while the current models are named Pentium. Note however, that several resellers will still refer to them as Pentium Dual-Core.
=="[[Yonah (microprocessor)|Yonah]]" (65 nm)==
- Based on the 32-bit Enhanced Pentium M microarchitecture
- All models support: MMX, SSE, SSE2, SSE3, Enhanced Intel SpeedStep Technology (EIST), XD bit (an NX bit implementation)
- Die size: 90.3 mm²
- Steppings: D0
- T2060 debuted on January 30, 2007 in notebooks only sold as part of Windows Vista launch bundles; it appears to be OEM-only.
- T2060 & T2080 were discovered to be an Intel Core T2050 & T2250 with half the L2 cache (old versions of CPU-Z identified them as T2050 & T2250)
{{cpulist|p6|head}}
{{cpulist|p6|yonah|model=Pentium Dual-Core T2060|ark=28021
|l2=1|fsb=533|mult=12|vmin=0.762|vmax=1.3|tdp=31|date=January 2007|links=1
|sspec1=SL9VX|step1=D0|part1=LF80539GE0251M}}
{{cpulist|p6|yonah|model=Pentium Dual-Core T2080|ark=29740
|l2=1|fsb=533|mult=13|vmin=0.762|vmax=1.3|tdp=31|date=April 2007
|sspec1=SL9VY|step1=D0|part1=LF80539GE0301M}}
{{cpulist|p6|yonah|model=Pentium Dual-Core T2130|ark=30769
|l2=1|fsb=533|mult=14|vmin=0.762|vmax=1.3|tdp=31|date=Middle 2007
|sspec1=SL9VZ|step1=D0|part1=LF80539GE0361M}}
{{cpulist|p6|yonah|model=Pentium Dual-Core T2350|ark=29751
|l2=2|fsb=533|mult=14|vmin=0.762|vmax=1.3|tdp=31|date=Middle 2007
|sspec1=SL9JK|step1=C0|part1=LF80539GE0362ME}}{{end}}
== [[Merom (microprocessor)#Merom-M|"Merom-M"]], [[Merom (microprocessor)#Merom-2M|"Merom-2M"]] (65 nm) {{anchor|"Merom-1M" (65 nm)|"Merom-1024" (65 nm)|Merom-1M does not exist}} ==
- Based on the 64-bit Core microarchitecture
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation)
- Die size: 111 mm²
- Steppings: M0
{{cpulist|core|head}}
{{cpulist|core|merom|model=Pentium Dual-Core T2310|ark=32431
|l2=1|fsb=533|mult=11|vmin=1.075|vmax=1.175|sock=Socket P|date=Q4 2007|links=1
|sspec1=SLAEC|step1=M0|part1=LF80537GE0201M}}
{{cpulist|core|merom|model=Pentium Dual-Core T2330|ark=32432
|l2=1|fsb=533|mult=12|vmin=1.075|vmax=1.175|sock=Socket P|date=Q4 2007
|sspec1=SLA4K|step1=M0|part1=LF80537GE0251MN}}
{{cpulist|core|merom|model=Pentium Dual-Core T2370|ark=34445
|l2=1|fsb=533|mult=13|vmin=1.075|vmax=1.175|sock=Socket P|date=Q4 2007
|sspec1=SLA4J|step1=M0|part1=LF80537GE0301M}}
{{cpulist|core|merom|model=Pentium Dual-Core T2390|ark=35153
|l2=1|fsb=533|mult=14|vmin=1.075|vmax=1.175|sock=Socket P|date=Q2 2008
|sspec1=SLA4H|step1=M0|part1=LF80537GE0361M}}
{{cpulist|core|merom|model=Pentium Dual-Core T2410[http://www.cpu-world.com/CPUs/Pentium_Dual-Core/Intel-Pentium%20Dual-Core%20Mobile%20T2410%20LF80537GE0411M.html Pentium Dual-Core T2410]
|l2=1|fsb=533|mult=15|vmin=1.075|vmax=1.175|sock=Socket P|date=Q3 2008
|sspec1=SLA4G|step1=M0|part1=LF80537GE0411M}}
{{cpulist|core|merom|model=Pentium Dual-Core T3200|ark=37160
|l2=1|fsb=667|mult=12|vmin=1.075|vmax=1.175|sock=Socket P|date=Q4 2008
|sspec1=SLAVG|step1=M0|part1=LF80537GF0411M}}
{{cpulist|core|merom|model=Pentium Dual-Core T3400|ark=35583
|l2=1|fsb=667|mult=13|vmin=1.075|vmax=1.175|sock=Socket P|date=Q4 2008
|sspec1=SLB3P|step1=M0|part1=LF80537GF0481M}}
{{end}}
== [[Penryn (microprocessor)#Penryn-3M|"Penryn-3M"]], [[Penryn (microprocessor)#Penryn-L|"Penryn-L"]] (45 nm) ==
{{Anchor|"Penryn-3M" (standard voltage, 45 nm)|"Penryn-3M" (45 nm)|"Penryn-1M" (45 nm)|"Penryn-1024" (45 nm)|"Penryn-3M" (45 nm, standard voltage)|"Penryn-L" (ultra-low voltage, 45 nm)|"Penryn-3M" (ultra-low voltage, 45 nm)|"Penryn-3M" (45 nm, ultra-low voltage)}}
- Based on the 64-bit Penryn microarchitecture
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation)
- Die size: 82 mm²
- Steppings: R0
{{cpulist|core|head}}
{{cpulist|core|section=Dual Core, standard power}}
{{cpulist|core|penryn|ark=37251|model=Pentium T4200 |sspec1=SLGJN |step1=R0 |l2=1 |fsb=800 |mult=10
|vmin=1.05|vmax=1.15|date=January 2009 |part1=AW80577GG0411MA |links=1}}
{{cpulist|core|penryn|ark=37253|model=Pentium T4300 |sspec1=SLGJM |step1=R0 |l2=1 |fsb=800 |mult=10.5
|vmin=1.05|vmax=1.15|date=April 2009 |part1=AW80577GG0451MA }}
{{cpulist|core|penryn|ark=40739|model=Pentium T4400 |sspec2=SLGJL | step2=R0 |l2=1 |fsb=800 |mult=11
|vmin=1.05|vmax=1.15|date=December 2009 |part1=AW80577GG0491MA }}
{{cpulist|core|penryn|ark=42925|model=Pentium T4500 |sspec1=SLGZC |step1=R0 |l2=1 |fsb=800 |mult=11.5
|vmin=1.05|vmax=1.15|date=January 2010 |part1=AW80577GG0521MA }}
{{cpulist|core|section=Single Core, ultra-low power}}
{{cpulist|core|penrynulv|model=Pentium SU2700|ark=42004
|l2=2|fsb=800|mult=6.5|vmin=1.05|vmax=1.15|tdp=10|date=May 23, 2009|links=1
|sspec1=SLGS8|step1=R0|part1=AV80585UG0132M}}
{{cpulist|core|section=Dual Core, ultra-low power}}
{{cpulist|core|penrynulv|ark=43568|model=Pentium SU4100 |sspec1=SLGS4 |step1=R0 |l2=2 |fsb=800
|mult=6.5|vmin=1.05|vmax=1.15|date=September 2009|part1=AV80577UG0132M |links=1}}
{{end}}
Note: The Pentium SU2X00 series processors have a single core, not two, according to Intel's website.
= Westmere based Pentiums =
== "[[Arrandale]]" ([[Multi-chip package|MCP]], 32 nm) ==
{{Anchor|"Arrandale" (32 nm)}}
- Based on Westmere microarchitecture
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Smart Cache
- FSB has been replaced with DMI.
- Contains 45 nm "Ironlake" GPU HD Graphics.
- Die size: 81 mm²
- Transistors: 382 million
- Graphics and Integrated Memory Controller die size: 114 mm²
- Transistors: 177 million
- Stepping: C2, K0
{{cpulist|nehgfx|head}}
{{cpulist|nehgfx|section=standard power}}
{{cpulist|nehgfx|arrandale|model=Pentium P6000|ark=49058
|mult=14|memspeed=1066|tdp=35|turbo={{n/a}}|gfxclock=500–667|l3=3|vmin=0.775|vmax=1.4|date=June 20, 2010|links=1
|sspec1=SLBWB|step1=C2|sock=Socket G1|part1=CP80617004170AF}}
{{cpulist|nehgfx|arrandale|model=Pentium P6100|ark=50175
|mult=15|memspeed=1066|tdp=35|turbo={{n/a}}|gfxclock=500–667|l3=3|vmin=0.775|vmax=1.4|date=September 26, 2010
|sspec1=SLBUR|step1=K0|sock=Socket G1|part1=CP80617004125AL}}
{{cpulist|nehgfx|arrandale|model=Pentium P6200|ark=50176
|mult=16|memspeed=1066|tdp=35|turbo={{n/a}}|gfxclock=500–667|l3=3|vmin=0.775|vmax=1.4|date=September 26, 2010
|sspec1=SLBUA|step1=K0|sock=Socket G1|part1=CP80617004122AW}}
{{cpulist|nehgfx|arrandale|model=Pentium P6300|ark=51680
|mult=17|memspeed=1066|tdp=35|turbo={{n/a}}|gfxclock=500–667|l3=3|vmin=0.775|vmax=1.4|date=January 9, 2011
|sspec1=SLBU8|step1=K0|sock=Socket G1|part1=CP80617004161AK}}
{{cpulist|nehgfx|section=ultra-low power}}
{{cpulist|nehgfx|arrandale|ark=49156|model=Pentium U5400
|mult=9|memspeed=800|tdp=18|turbo={{n/a}}|gfxclock=166–500|l3=3|vmin=0.725|vmax=1.4|date=May 25, 2010|links=1
|sspec1=SLBUH|step1=K0|sock=1288|part1=CN80617006042AC}}
{{cpulist|nehgfx|arrandale|model=Pentium U5600|ark=50029
|mult=10|memspeed=800|tdp=18|turbo={{n/a}}|gfxclock=166–500|l3=3|vmin=0.725|vmax=1.4|date=January 9, 2011
|sspec1=SLBSM|step1=K0|sock=1288|part1=CN80617005190AG}}
{{end}}
= Sandy Bridge based Pentiums =
== "[[Sandy Bridge (microarchitecture)|Sandy Bridge]]" (32 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Smart Cache.
- HD Graphics (Sandy Bridge) contain 6 EUs as well as HD Graphics 2000, but does not support the following technologies: Intel Quick Sync Video, InTru 3D, Clear Video HD, Wireless Display, Intel Insider.
- Transistors: 504 million
- Die size: 131 mm²
{{cpulist|bridge|head}}
{{cpulist|bridge|section=standard power}}
{{cpulist|bridge|sandybridge|model=Pentium B940|ark=55626
|cores=2|l3=2|mult=20|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=June 19, 2011|links=1
|sspec1=SR07S|step1=Q0|sock1=Socket G2|part1=FF8062700847801}}
{{cpulist|bridge|sandybridge|model=Pentium B950|ark=55627
|cores=2|l3=2|mult=21|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=June 19, 2011
|sspec1=SR07T|step1=Q0|sock1=Socket G2|part1=FF8062700847901}}
{{cpulist|bridge|sandybridge|model=Pentium B960|ark=59836
|cores=2|l3=2|mult=22|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=October 2, 2011
|sspec1=SR0C9|sspec2=SR07V|step1=D2|step2=Q0|sock1=Socket G2|part1=FF8062701123900|part2=FF8062700997701}}
{{cpulist|bridge|sandybridge|model=Pentium B970|ark=63915
|cores=2|l3=2|mult=23|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1100|tdp=35|date=January 2012
|sspec1=SR0J2|step1=Q0|sock1=Socket G2|part1=FF8062700998002}}
{{cpulist|bridge|sandybridge|model=Pentium B980|ark=69669
|cores=2|l3=2|mult=24|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650–1150|tdp=35|date=September 2012
|sspec1=SR0J1|step1=Q0|sock1=Socket G2|part1=FF8062700997802}}
{{cpulist|bridge|section=ultra-low power}}
{{cpulist|bridge|sandybridge|model=Pentium 957|ark=55628
|cores=2|l3=2|mult=12|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–800|tdp=17|date=June 19, 2011
|sspec1=SR089|step1=Q0|sock1=BGA-1023|part1=AV8062700852600}}
{{cpulist|bridge|sandybridge|model=Pentium 967|ark=59802
|cores=2|l3=2|mult=13|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=October 2, 2011
|sspec1=SR0EX|sspec2=SR0FC|step1=Q0|step2=J1|sock1=BGA-1023|part1=AV8062701022501|part2=AV8062701147801}}
{{cpulist|bridge|sandybridge|model=Pentium 977|ark=63916
|cores=2|l3=2|mult=14|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=January 2012
|sspec1=SR0EY|sspec2=SR0FB|sspec3=SR0V1|step1=J1|step2=J1|step3=Q0|sock1=BGA-1023|part1=AV8062701022601|part2=AV8062701147701|part3=AV8062701022601}}
{{cpulist|bridge|sandybridge|model=Pentium 987|ark=67194
|cores=2|l3=2|mult=15|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=Q3 2012
|sspec1=SR08E|sspec2=SR0F1|sspec3=SR0FA|sspec4=SR0V4|step1=Q0|step2=Q0|step3=J1|step4=Q0|sock1=BGA-1023|part1=AV8062701084700|part2=AV8062701084701|part3=AV8062701147601|part4=AV8062701084701}}
{{cpulist|bridge|sandybridge|model=Pentium 997|ark=69360
|cores=2|l3=2|mult=16|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350–1000|tdp=17|date=September 2012
|sspec1=SR08F|sspec2=SR0F2|sspec3=SR0F9|sspec4=SR0V5|step1=Q0|step2=Q0|step3=J1|step4=Q0|sock1=BGA-1023|part1=AV8062701084800|part2=AV8062701084801|part3=AV8062701147501|part4=AV8062701084801}}
{{end}}
= Ivy Bridge based Pentiums =
== "[[Ivy Bridge (microarchitecture)|Ivy Bridge]]" (22 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache.
- HD Graphics (Ivy Bridge) contain 6 EUs as well as HD Graphics 2500, but does not support the following technologies: Intel Quick Sync Video, InTru 3D, Clear Video HD, Wireless Display, Intel Insider.
- Transistors: 1.4 billion
- Die size: 160 mm²
{{cpulist|bridge|head}}
{{cpulist|bridge|section=standard power}}
{{cpulist|bridge|ivybridge|model=Pentium A1018|ark=78429
|cores=2|l3=1|mult=21|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1000|tdp=35|date=June 2013|links=1
|sspec1=SR1C5|step1=P0|sock1=Socket G2|part1=AW8063801567000
|sspec2=SR1V6|step2=P0|sock2=|part2=}}
{{cpulist|bridge|ivybridge|model=Pentium 2020M|ark=71142
|cores=2|l3=2|mult=24|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1100|tdp=35|date=September 2012
|sspec1=SR0U1|step1=L1|sock1=Socket G2|part1=AW8063801211202
|sspec2=SR184|step2=E1|part2=AW8063801539300}}
{{cpulist|bridge|ivybridge|model=Pentium 2030M|ark=72059
|cores=2|l3=2|mult=25|turbo={{n/a}}|gfxmodel=6eu|gfxclock=650-1100|tdp=35|date=January 2013
|sspec1=SR0ZZ|step1=P0|sock1=Socket G2|part1=AW8063801120500}}
{{cpulist|bridge|section=low power}}
{{cpulist|bridge|ivybridge|model=Pentium 2117U|ark=71469
|cores=2|l3=2|mult=18|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350-1000|tdp=17|date=September 2012
|sspec1=SR0VQ|step1=P0|sock1=BGA-1023|part1=AV8063801058800}}
{{cpulist|bridge|ivybridge|model=Pentium 2127U|ark=75191
|cores=2|l3=2|mult=19|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350-1000|tdp=17|date=June 2013
|sspec1=SR105|step1=P0|sock1=BGA-1023|part1=AV8063801119100}}
{{cpulist|bridge|section=ultra-low power}}
{{cpulist|bridge|ivybridge|model=Pentium 2129Y|ark=72016
|cores=2|l3=2|mult=11|turbo={{n/a}}|gfxmodel=6eu|gfxclock=350-850|tdp=10|date=January 2013
|sspec1=SR12M|step1=P0|sock1=BGA-1023|part1=AV8063801377901}}
{{end}}
= Haswell based Pentiums =
== "[[Haswell (microarchitecture)|Haswell-MB]]" (22 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache.
- Transistors: 1.3 billion
- Die size: 181 mm²
{{cpulist|haswell|head}}
{{cpulist|haswell|haswell|model=Pentium 3550M|ark=77404
|cores=2|l3=2|mult=23|turbo={{n/a}}|gfxmodel=10eu|gfxclock=400–1100|tdp=37|date=September 2013|links=1
|sspec1=SR1HD|step1=C0|sock=946B|part1=CW8064701486907}}
{{cpulist|haswell|haswell|model=Pentium 3560M|ark=81013
|cores=2|l3=2|mult=24|turbo={{n/a}}|gfxmodel=10eu|gfxclock=400–1100|tdp=37|date=April 2014
|sspec1=SR1LC|step1=C0|sock=946B|part1=CW8064701486906}}
{{end}}
== "Haswell-ULT" ([[system in package|SiP]], 22 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache.
- 3558U also supports Intel Wireless Display.
- Transistors: 1.3 billion
- Die size: 181 mm²
{{cpulist|haswell|head}}
{{cpulist|haswell|haswell|model=Pentium 3556U|ark=76621
|cores=2|l3=2|mult=17|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1000|tdp=15|date=September 2013|links=1
|sspec1=SR1E3|step1=D0|sock1=BGA-1168|part1=CL8064701558100}}
{{cpulist|haswell|haswell|model=Pentium 3558U|ark=78945
|cores=2|l3=2|mult=17|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–1000|tdp=15|date=December 2013
|sspec1=SR1E8|step1=D0|sock1=BGA-1168|part1=CL8064701569500}}
{{end}}
== "Haswell-ULX" ([[system in package|SiP]], 22 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache.
- 3561Y also supports Intel Wireless Display.
- Transistors: 1.3 billion
- Die size: 181 mm²
{{cpulist|haswell|head}}
{{cpulist|haswell|haswell|model=Pentium 3560Y|ark=76622
|cores=2|l3=2|mult=12|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–850|tdp=11.5|date=September 2013|links=1
|sspec1=SR1DE|step1=D0|sock1=BGA-1168|part1=CL8064701486008}}
{{cpulist|haswell|haswell|model=Pentium 3561Y|ark=78946
|cores=2|l3=2|mult=12|turbo={{n/a}}|gfxmodel=10eu|gfxclock=200–850|tdp=11.5|date=December 2013
|sspec1=SR1DG|step1=D0|sock1=BGA-1168|part1=CL8064701568201}}
{{end}}
== "[[Broadwell (microarchitecture)|Broadwell-U]]" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, Smart Cache, Intel Wireless Display, and configurable TDP (cTDP) down
- 3825U also supports Hyper-threading.
- Transistors: 1.3 billion
- Die size: 82 mm²
{{cpulist|haswell|head}}
{{cpulist|haswell|haswell|model=Pentium 3805U|sspec1=SR210|step1=E0|sock=1168|ark=84813|cores=2|l3=2|mult=19|turbo={{n/a}}|gfxmodel=12eu|gfxclock=100–800|tdp=15|date=January 2015|part1=FH8065801620702|}}
{{cpulist|haswell|haswell|model=Pentium 3825U|sspec1=SR24B|step1=F0|sock=1168|ark=86348|cores=2|l3=2|mult=19|turbo={{n/a}}|gfxmodel=12eu|gfxclock=300–850|tdp=15|date=March 2015|part1=FH8065801620705|}}
{{end}}
= Silvermont based Pentiums =
=="[[Silvermont|Bay Trail-M]]" (22 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Ivy Bridge Intel HD Graphics, with 4 execution units, and supports DirectX 11, OpenGL 4.0, OpenGL ES 3.0 and OpenCL 1.1 (on Windows). N3530 and N3540 support Intel Quick Sync Video.
- Package size: 25 mm × 27 mm
- Transistors: 960 million
- Die size: 130 mm²
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium N3510|ark=76751|cores=4|mult=24|gfxmodel=4eu
|gfxclock=313-750|l2=2|mem=2 × DDR3L-1333|vmin=0.4|vmax=1.14|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=September 2013|links=1
|sspec1=SR1LV|sspec2=SR1HP|step1=B2|step2=B2|part1=FH8065301546301}}
{{cpulist|silvermont|baytrail|model=Pentium N3520|ark=79049|cores=4|mult=26|burst=2.42|gfxmodel=4eu
|gfxclock=313-854|mem=2 × DDR3L-1333|vmin=0.4|vmax=1.14|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=November 2013
|sspec1=SR1SE|sspec2=|step1=B3|step2=|part1=FH8065301616103}}
{{cpulist|silvermont|baytrail|model=Pentium N3530|ark=81074|cores=4|mult=26|burst=2.58|gfxmodel=4eu
|gfxclock=313-896|mem=2 × DDR3L-1333|vmin=0.4|vmax=1.14|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=February 2014
|sspec1=SR1W2|step1=C0|part1=FH8065301728501}}
{{cpulist|silvermont|baytrail|model=Pentium N3540|ark=82105|cores=4|mult=26|burst=2.66|gfxmodel=4eu
|gfxclock=313-896|mem=2 × DDR3L-1333|vmin=|vmax=|tdp=7.5|sdp=4.5|sock1=FC-BGA 1170|date=July 2014
|sspec1=SR1YW|step1=C0|part1=FH8065301919700}}
{{end}}
= Airmont based Pentiums =
=="[[Silvermont|Braswell]]" (14 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, AES-NI.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Broadwell Intel HD Graphics, with 16 execution units, and supports DirectX 11.2, OpenGL 4.3, OpenGL ES 3.0 and OpenCL 1.2 (on Windows).
- Package size: 25 mm × 27 mm
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium N3700|ark=87261|cores=4|mult=19.2|burst=2.4|gfxmodel=16eu
|gfxclock=400-700|l2=2|mem=2 × DDR3L-1600|vmin=0.4|vmax=1.14|tdp=6|sdp=4|sock1=FC-BGA 1170|date=March 2015|links=1
|sspec1=SR29E|sspec2=SR2A7|step1=C0|step2=C0|part1=FH8066501715906|part2=FH8066501715923}}
{{cpulist|silvermont|baytrail|model=Pentium N3710|ark=91830|cores=4|mult=19.2|burst=2.56|gfxmodel=405
|gfxclock=400-700|l2=2|mem=2 × DDR3L-1600|vmin=|vmax=|tdp=6|sdp=4|sock1=FC-BGA 1170|date=January 2016
|sspec1=SR2KL|step1=D1|part1=FH8066501715927}}
{{end}}
= Skylake based Pentiums =
== "[[Skylake (microarchitecture)|Skylake-U]]" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Hyper-threading, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Smart Cache, Intel Wireless Display, and configurable TDP (cTDP) down
- GPU supports DirectX 12, OpenGL 4.4 and Intel Quick Sync Video.
{{cpulist|skylake|head}}
{{cpulist|skylake|skylake|model=Pentium 4405U|sspec1=SR2EX|step1=D1|sock=1356|ark=89611|cores=2|threads=4|l3=2|mult=21|turbo={{n/a}}|gfxmodel=510|gfxclock=300–950|tdp=15|date=September 2015|part1=FJ8066201930905}}
{{end}}
== "[[Skylake (microarchitecture)|Skylake-Y]]" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Hyper-threading, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Smart Cache, Intel Wireless Display, and configurable TDP (cTDP) down
- GPU supports DirectX 12, OpenGL 4.4 and Intel Quick Sync Video.
{{cpulist|skylake|head}}
{{cpulist|skylake|skylake|model=Pentium 4405Y|sspec1=SR2ER|step1=D1|sock=1515|ark=89612|cores=2|threads=4|l3=2|mult=15|turbo={{n/a}}|gfxmodel=515|gfxclock=300–800|tdp=6|date=September 2015|part1=HE8066201931229}}
{{end}}
= Goldmont based Pentiums =
=="[[Goldmont|Apollo Lake]]" (14 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Skylake Intel HD Graphics, with 18 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0, OpenCL 1.2 (on Windows) and Intel Quick Sync Video.
- Package size: 24 mm × 31 mm
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium N4200|ark=95592|cores=4|mult=13.2|burst=2.5|gfxmodel=505
|gfxclock=200-750|l2=2|mem=2 × DDR3L-1866
2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4|sock1=FC-BGA 1296|date=September 2016|links=1
|sspec1=SR2Y9|sspec2=SR2Z5|sspec3=SR36K|sspec4=SRGVZ|step1=B0|step2=B1|step3=|step4=F1|part1=FH8066802979703}}
{{end}}
= Goldmont Plus based Pentiums =
=="[[Goldmont Plus|Gemini Lake]]" (14 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Intel SGX.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Kaby Lake Intel HD Graphics, with 18 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 1.2 (on Windows).
- Package size: 25 mm × 24 mm
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium Silver N5000|ark=128990|cores=4|mult=13.2|burst=2.7|gfxmodel=605
|gfxclock=200-750|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1090|date=December 2017|links=1
|sspec1=SR3RZ|step1=B0|part1=FH8068003067406}}
{{end}}
=="[[Goldmont Plus|Gemini Lake Refresh]]" (14 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Intel SGX.
- GPU and memory controller are integrated onto the processor die
- GPU is based on Kaby Lake Intel HD Graphics, with 18 execution units, and supports DirectX 12, OpenGL 4.5, OpenGL ES 3.0 and OpenCL 1.2 (on Windows).
- Package size: 25 mm × 24 mm
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium Silver N5030|ark=197308|cores=4|mult=13.2|burst=3.1|gfxmodel=605
|gfxclock=200-750|l2=4|mem=2 × LPDDR4-2400|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1090|date=December 2019
|sspec1=SRFDC|step1=R0|part1=FH8068003067442}}
{{end}}
= Kaby Lake based Pentiums =
== "[[Kaby Lake|Kaby Lake-U]]" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SGX, MPX, Hyper-threading, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Smart Cache, and configurable TDP (cTDP) down.
{{cpulist|skylake|head}}
{{cpulist|skylake|skylake|model=Pentium Gold 4415U|sock=1356|ark=96508|cores=2|threads=4|l3=2|mult=23|turbo={{n/a}}|gfxmodel=610|gfxclock=300–950|tdp=15|date=January 2017|sspec1=SR348|step1=H0|part1=FJ8067702739932}}
{{end}}
Note: Pentium 4415U was renamed to Pentium Gold 4415U (end 2017).
== "[[Kaby Lake|Kaby Lake-Y]]" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SGX, MPX, Hyper-threading, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Smart Cache, and configurable TDP (cTDP) down.
{{cpulist|skylake|head}}
{{cpulist|skylake|skylake|model=Pentium Gold 4410Y |sock=1515 |ark=97140 |cores=2 |threads=4 |l3=2 |mult=15 |turbo={{n/a}} |gfxmodel=615 |gfxclock=300–850 |tdp=6 |date=January 2017 |sspec1=SR34B |step1=H0 |part1= HE8067702740013}}
{{cpulist|skylake|skylake|model=Pentium Gold 4415Y |sock=1515 |ark=122697|cores=2 |threads=4 |l3=2 |mult=16 |turbo={{n/a}} |gfxmodel=615 |gfxclock=300–850 |tdp=6 |date=June 2017 |sspec1=SR3GA |step1=H0 |part1=HE8067702740018}}
{{end}}
== "Kaby Lake Refresh" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SGX, MPX, Hyper-threading, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Smart Cache, and configurable TDP (cTDP) down.
{{cpulist|skylake|head}}
{{cpulist|skylake|skylake|model=Pentium Gold 4417U|ark=189269|cores=2|l3=2|threads=4|mult=23|turbo={{n/a}}|gfxmodel=610|gfxclock=300–950|tdp=15|date=January 2019
|sspec1=SRESH|step1=Y0|sock=1356|part1=FJ8067703282813}}
{{end}}
== "Amber Lake-Y" (14 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SGX, MPX, Hyper-threading, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Smart Cache, and configurable TDP (cTDP) down.
- Pentium Gold 6500Y also support: AVX, AVX2, FMA3, Turbo Boost, and configurable TDP (cTDP) up.
{{cpulist|skylake|head}}
{{cpulist|skylake|skylake|model=Pentium Gold 4425Y |sock=1515 |ark=192786|cores=2 |threads=4 |l3=2 |mult=17 |turbo={{n/a}} |gfxmodel=615 |gfxclock=300–850 |tdp=6 |date=February 2019 |sspec1=SRD24 |step1=H0 |part1=HE8067702740049}}
{{cpulist|skylake|skylake|model=Pentium Gold 6500Y|ark=213357|cores=2|threads=4|mult=11|turbo=3.4 GHz|l3=4|gfxmodel=UHD Graphics 615|gfxclock=300–900|tdp=5|date=January 2021
|sspec1=|step1=|sock=1515|part1=}}
{{end}}
= Coffee Lake based Pentiums =
== "Whiskey Lake-U" (14 nm) ==
{{cpulist|skylake|head}}
{{cpulist|skylake|skylake|model=Pentium Gold 5405U|ark=189310|cores=2|l3=2|threads=4|mult=23|turbo={{n/a}}|gfxmodel=U610|gfxclock=300–950|tdp=15|date=January 2019|sspec1=SRESL|step1=W0|sock=1528|part1=CL8068404080703|sspec2=SRFG1|step2=V0|part2=CL8068404080706}}
{{end}}
= Comet Lake based Pentiums =
== "[[Comet Lake|Comet Lake-U]]" (14 nm) ==
{{cpulist|skylake|head}}
{{cpulist|skylake|skylake|model=Pentium Gold 6405U|ark=197888|cores=2|l3=2|threads=4|mult=24|turbo={{n/a}}|gfxmodel=U610|gfxclock=300–950|tdp=15|date=October 2019|sspec1=SRGL2|step1=V0|sock=1528|part1=FJ8070104307703}}
{{end}}
= Ice Lake based Pentiums =
== "[[Ice Lake (microprocessor)|Ice Lake-U]]" (10 nm) ==
{{cpulist|skylake|head}}
{{cpulist|skylake|icelake|model=Pentium 6805|ark=205686|cores=2|l2=2 × 512|l3=4|threads=4|mult=11|turbo=3.0 GHz|gfxmodel=UHD Graphics (32 EU)|gfxclock=300–850|tdp=15|date=Q4 2020|sspec1=SRK0U|step1=D1|sock=1526|part1=FJ8068904310016}}
{{end}}
= Tiger Lake based Pentiums =
== "[[Tiger Lake (microprocessor)|Tiger Lake-UP3]]" (10 nm SuperFin) ==
- All models support: SSE4.1, SSE4.2, AVX2, FMA3, Speed Shift Technology (SST), Intel 64, Intel VT-x, Intel VT-d, Turbo Boost, Hyper-threading, AES-NI, Smart Cache, DL Boost, Optane memory, GNA 2.0, IPU6, TB4.
{{cpulist|tigerlake|head}}
{{cpulist|tigerlake|tigerlake|model=Pentium Gold 7505|ark=208667|cores=2|l3=4|threads=4|mult=20|turbo=3.5 GHz|gfxmodel=UHD Graphics (48 EU)|gfxclock=?–1250|tdp=15|mem={{nowrap|2× LPDDR4X-3733}}
2× DDR4-3200|date=October 2020|sspec1=SRK0A|step1=B1|sock=1449|part1=FH8069004531802}}
{{end}}
= Tremont based Pentiums =
=="[[Tremont (microarchitecture)|Jasper Lake]]" (10 nm)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI, Intel SHA Extensions, MBEC, SMAP/SMEP
- Package size: 35 mm x 24 mm
- DDR4/LPDDR4 dual-channel memory controller supporting up to 16 GB
- Display controller with 1 MIPI DSI 1.2 port and 3 DDI ports (eDP 1.4b, MIPI DSI 1.2, DP 1.4a, or HDMI 2.0b)
- Integrated Intel HD Graphics (Gen11) GPU
- PCI Express 3.0 controller supporting 8 lanes (multiplexed); 4 lanes available externally
- Two USB 3.2 2x1 ports (a.k.a. USB 3.1)
- Four USB 3.2 1x1 ports (a.k.a. USB 3.0)
- Eight USB 2.0 ports
- Two SATA-600 ports
- Integrated HD audio controller
- Integrated image signal processor supporting four cameras (three concurrent)
- Integrated memory card reader supporting SDIO 3.0 and eMMC 5.1
- Serial I/O supporting SPI, HSUART (serial port) and I2C
- Integrated CNVi with Wi-Fi 6 (IEEE 802.11ax 1x1 and 2x2) and Bluetooth 5.x (using UART/I2S/USB2)
{{cpulist|tremont|head}}
{{cpulist|tremont|jasperlake|model=Pentium Silver N6000|ark=212330|cores=4|freq=1.1|burst=3.3|gfxmodel=UHD Graphics (32 EUs)
|gfxclock=350-850|l2=1.5|l3=4|mem=2 × DDR4/LPDDR4X-2933|vmin=|vmax=|tdp=6|sdp=4.8|sock1=FC-BGA 1338|date=January 2021
|sspec1=SRKGY|step1=A1|part1=DC8069704609905}}
{{cpulist|tremont|jasperlake|model=Pentium Silver N6005|ark=212327|cores=4|freq=2.0|burst=3.3|gfxmodel=UHD Graphics (32 EUs)
|gfxclock=450-900|l2=1.5|l3=4|mem=2 × DDR4/LPDDR4X-2933|vmin=|vmax=|tdp=10|sock1=FC-BGA 1338|date=January 2021
|sspec1=SRKGU|step1=A1|part1=DC8069704609807}}
{{end}}
= Alder Lake based Pentiums =
== "[[Alder Lake (microprocessor)|Alder Lake-U]]" (Intel 7) ==
- All models support: SSE4.1, SSE4.2, AVX, AVX2, FMA3, Speed Shift Technology (SST), Intel 64, Intel VT-x, Intel VT-d, Hyper-threading, Turbo Boost, AES-NI, IPU6 (except SRLFV), TB4, Smart Cache, Thread Director, DL Boost, and GNA 3.0.
- Support 20 lanes (UP3) or 14 lanes (UP4) of PCI Express 4.0/3.0.
- All models support up to LPDDR5-5200 or LPDDR4X-4266 memory
- Standard power models also support up to DDR5-4800 or DDR4-3200 memory.
class="wikitable" style="font-size:90%"
! rowspan=2 | Model ! colspan=4 | P-core (performance) ! colspan=4 | E-core (efficiency) ! rowspan=2 | L3 ! rowspan=2 | GPU ! rowspan=2 | GPU ! colspan=2 | Power ! rowspan=2 | Socket ! rowspan=2 | I/O bus ! rowspan=2 style="text-align:right;" {{!}} Release date ! rowspan=2 | sSpec ! rowspan=2 | Part |
Cores (threads) ! Freq. ! Turbo ! Cores ! Freq. ! Turbo ! L2 ! Base ! Max |
---|
align="left" colspan=20 style="background:#127cc1;color: white" | Standard power (UP3) |
[https://ark.intel.com/content/www/us/en/ark/products/226265.html Pentium 8505]
| 1 (2) | 1.2 GHz | 4.4 GHz | {{nobreak|1 × 1.25}} MB | 4 (4) | 0.9 GHz | 3.3 GHz | {{nobreak|1 × 2}} MB | 8 MB | UHD Graphics (48 EU) | ?–1100 MHz | 15 W | 55 W | BGA 1744 | style="text-align:right;" | February 2022 | SRLFV (R0) | FJ8071504827200 |
align="left" colspan=20 style="background:#127cc1;color: white" | Low power (UP4) |
[https://ark.intel.com/content/www/us/en/ark/products/226449.html Pentium 8500]
| 1 (2) | 1.0 GHz | 4.4 GHz | {{nobreak|1 × 1.25}} MB | 4 (4) | 0.7 GHz | 3.3 GHz | {{nobreak|1 × 2}} MB | 8 MB | UHD Graphics (48 EU) | ?–800 MHz | 9 W | 29 W | BGA 1781 | style="text-align:right;" | February 2022 | | | |
Server processors
= Sandy Bridge based Pentiums =
== "[[Sandy Bridge (microarchitecture)|Sandy Bridge]]" (32 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Smart Cache, Hyper-threading.
- No models include HD Graphics.
- Transistors: 624 or 504 million
- Die size: 149 or 131 mm2
{{cpulist|bridge|head}}
{{cpulist|bridge|sandybridge|model=Pentium 350|ark=61272|cores=2|l3=3|mult=12|turbo={{n/a}}|iobus=|gfxmodel=|tdp=15|date=November 25, 2011|links=1|sspec1=SR0FT |step1=Q0|sock=1155|part1=CM8062301140700}}
{{end}}
== "Sandy Bridge-EN" (32 nm) ==
- Based on Sandy Bridge-E CPU.
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), TXT, Intel VT-x, Intel VT-d, AES-NI, Smart Cache.
{{cpulist|bridge-e|head}}
{{cpulist|bridge-e|section=standard power}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium 1403|ark=67415|cores=2|l3=5|mult=26|turbo={{n/a}}|tdp=80|mem=3 × DDR3-1066|date=May 14, 2012|links=1|sspec1=SR0LQ|step1=M1|sock=1356|part1=CM8062007188500}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium 1407|ark=67416|cores=2|l3=5|mult=28|turbo={{n/a}}|tdp=80|mem=3 × DDR3-1066|date=May 14, 2012|sspec1=SR0LP|step1=M1|sock=1356|part1=CM8062007188404}}
{{cpulist|bridge-e|section=low power}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium 1405|ark=66660|cores=2|l3=5|mult=12|turbo=1.8 GHz|tdp=40|mem=3 × DDR3-1066|date=August 2012|sspec1=SR0M7|step1=M1|sock=1356|part1=CM8062001093700}}
{{end}}
= Ivy Bridge based Pentiums =
== "Ivy Bridge-EN" (22 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, F16C, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), TXT, Intel VT-x, Intel EPT, Intel VT-d, Intel VT-c, Intel x8 SDDC, AES-NI, Smart Cache.
- Support for up to 6 DIMMS of DDR3 memory.
{{cpulist|bridge-e|head}}
{{cpulist|bridge-e|section=standard power}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium 1403 v2|ark=77919|cores=2|l3=6|mult=26|turbo={{n/a}}|tdp=80|mem=3 × DDR3-1600|date=Jan 9, 2014|sspec1=SR1B1|step1=S1|sock=1356|part1=CM8063401376602}}
{{cpulist|bridge-e|section=low power}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium 1405 v2|ark=77918|cores=2|l3=6|mult=14|turbo={{n/a}}|tdp=40|mem=3 × DDR3-1600|date=Jan 9, 2014|sspec1=SR1AW|step1=S1|sock=1356|part1=CM8063401294304}}
{{end}}
= Broadwell based Pentiums =
== "[[Broadwell (microarchitecture)|Broadwell-DE]]" (14 nm, SoC) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, F16C, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), TXT, Intel VT-x, Intel EPT, Intel VT-d, AES-NI, Smart Cache, ECC memory.
- D1508, D1517, D1519 also support Hyper-threading, Turbo Boost.
- SoC peripherals include 8 × USB (4 × 2.0, 4 × 3.0), 6 × SATA, 2 × Integrated 10 GbE LAN, UART, GPIO, and 32 lanes of PCI Express (8 × 2.0, 24 × 3.0), in ×16, ×8 and ×4 configurations.
- Support for up to four DIMMs of DDR4 or DDR3L memory per CPU socket.
{{cpulist|bridge-e|head}}
{{cpulist|bridge-e|section=Dual Core}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium D1507|ark=91561|cores=2|l3=3|mult=12|turbo={{n/a}}|tdp=20|mem=2 × DDR4-2133
2 × DDR3L-1600|date=November 2015|sspec1=SR2DP|step1=V2|sock1=FC-BGA 1667|part1=GG8067402569800|links=1}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium D1508|ark=91558|cores=2|l3=3|mult=22|turbo=2.6 GHz|tdp=25|mem=2 × DDR4-2133
2 × DDR3L-1600|date=November 2015|sspec1=SR2DQ|step1=V2|sock1=FC-BGA 1667|part1=GG8067402569900}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium D1509|ark=91560|cores=2|l3=3|mult=15|turbo={{n/a}}|tdp=19|mem=2 × DDR4-2133
2 × DDR3L-1600|date=November 2015|sspec1=SR2JA|step1=V2|sock1=FC-BGA 1667|part1=GG8067402570103}}
{{cpulist|bridge-e|section=Quad Core}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium D1517|ark=91557|cores=4|l3=6|mult=16|turbo=2.2 GHz|tdp=25|mem=2 × DDR4-2133
2 × DDR3L-1600|date=November 2015|sspec1=SR2GG|step1=V2|sock1=FC-BGA 1667|part1=GG8067402612800}}
{{cpulist|bridge-e|sandybridge_e|model=Pentium D1519|ark=91559|cores=4|l3=6|mult=15|turbo=2.1 GHz|tdp=25|mem=2 × DDR4-2133
2 × DDR3L-1600|date=April 2016|sspec1=SR2DM|step1=V2|sock1=FC-BGA 1667|part1=GG8067402569601}}
{{end}}
Embedded processors
= Sandy Bridge based Pentiums =
== "Gladden" (32 nm) ==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, EPT, Hyper-threading, Smart Cache, ECC memory.
- Transistors:
- Die size:
{{cpulist|bridge|head}}
{{cpulist|bridge|section=standard power}}
{{cpulist|bridge|sandybridge|model=Pentium B915C|ark=68333
|cores=2|l3=3|mult=15|turbo={{n/a}}|tdp=15|date=Q2 2012|links=1
|sspec1=SR0NZ|step1=Q0|sock1=FC-BGA1284|part1=AV8062701147401}}
{{end}}
== "Gladden" (22 nm) ==
{{cpulist|bridge|head}}
{{cpulist|bridge|section=standard power}}
{{cpulist|bridge|ivybridge|model=Pentium B925C|ark=78169|cores=2|l3=4|mult=20|turbo={{n/a}}|tdp=15|date=Sept 10, 2013|links=1|sspec1=SR1J3|step1=|sock1=FC-BGA1284|part1=CN8063801307903}}
{{end}}
=Tremont based Pentiums=
=="[[Tremont (microarchitecture)|Elkhart Lake]]" (10 nm SuperFin)==
- All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, AES-NI.
- GPU is based on Gen11 Intel HD Graphics, with up to 32 execution units, and supports up to 3 displays (4K @ 60 Hz) through HDMI, DP, eDP, or DSI.
- SoC peripherals include 4 × USB 2.0/3.0/3.1, 2 × SATA, 3 × 2.5GbE LAN, UART, and up to 8 lanes of PCI Express 3.0 in x4, x2, and x1 configurations.
- Package size: 35 mm × 24 mm
{{cpulist|silvermont|head}}
{{cpulist|silvermont|baytrail|model=Pentium N6415|ark=207906|cores=4|freq=1.2|burst=3.0|gfxmodel=UHD Graphics (16 EUs)|gfxclock=350–800|l2=1.5|mem=4 × LPDDR4X-3200
2 × DDR4-3200|tdp=6.5|sock1=FC-BGA 1493|date=Q1 2021|links=1 |sspec1=SRKLA|step1=B1|part1=DC8070304190820}}
{{cpulist|silvermont|baytrail|model=Pentium J6426|ark=207903|cores=4|freq=2.0|burst=3.0|gfxmodel=UHD Graphics (32 EUs)|gfxclock=400–850|l2=1.5|mem=4 × LPDDR4X-3200
2 × DDR4-3200|tdp=10|sock1=FC-BGA 1493|date=Q1 2021|sspec1=SRKUB|step1=B1|part1=DC8070304190882}}
{{end}}
See also
Legacy architectures:
- List of Intel Pentium Pro processors
- List of Intel Pentium II processors
- List of Intel Pentium III processors
- List of Intel Pentium 4 processors
- List of Intel Pentium D processors
- List of Intel Pentium M processors
- List of Intel Core processors
- List of Intel Core 2 processors
- List of Intel Celeron processors
Current architectures:
References
{{Reflist|refs=
}}
External links
- [http://qdms.intel.com/MDDS/MDDSView.aspx Search MDDS Database]
- [http://ark.intel.com/ Intel ARK Database]
- [http://www.intel.com/support/processors/pentiumdualcore/sb/CS-026774.htm Intel Pentium processor for desktop product order codes]
- [http://www.intel.com/support/processors/mobile/pentiumdualcore/sb/CS-029981.htm Intel Pentium processor for mobile product order codes]
{{Intel processors|*}}
{{DEFAULTSORT:List Of Intel Pentium Processors}}