Lunar Lake#Mobile processors

On May 24, 2024, details on the Lunar Lake architecture were unveiled during Intel's Computex presentation in Taiwan. SKU names of Lunar Lake processors or details such as clock speeds were not announced.{{cite web |last1=Wilson |first1=Matthew |date=June 4, 2024 |title=Computex 2024: Intel reveals Lunar Lake CPU details |url=https://www.kitguru.net/components/cpu/matthew-wilson/computex-2024-intel-reveals-lunar-lake-cpu-details/ |website=KitGuru |language=en-GB |access-date=June 4, 2024}}

File:2024-09-06 15 39 26-Intel Core Ultra Lunar Lake DEMO live HANDS-ON (DecodingIT).png

File:Intel Core Ultra 258V, verbaut in einem ASUS Zenbook S 14 UX5406.png

Lunar Lake is an ultra-low power mobile SoC design. It is a successor to 15 W Meteor Lake-U processors while Arrow Lake replaces the midrange 28 W Meteor Lake-H processors. Lunar Lake's focus on increased power efficiency targets premium ultra-thin laptops and compact mobile designs. Intel said that with Lunar Lake, it aimed to "bust the myth that [x86] can't be as efficient" as ARM.{{cite web |last1=Burek |first1=John |date=June 4, 2024 |title='Lunar Lake' Explained: How Intel's Moonshot Mobile CPUs Will Escalate the AI Wars |url=https://uk.pcmag.com/laptops/152630/lunar-lake-explained-how-intels-moonshot-mobile-cpus-will-escalate-the-ai-wars |website=PCMag |language=en-GB |access-date=June 4, 2024}} Analysis of tests performed on Lunar Lake CPUs available at market launch indicated that, although their multi-core performance was not particularly good under full load, their efficiency under everyday use was good, even if the ARM competition still has its advantages.{{cite web |last1=Osthoff |first1=Andreas |title=Intel Lunar Lake CPU analysis -- The Core Ultra 7 258V's multi-core performance is disappointing, but its everyday efficiency is good |url=https://www.notebookcheck.net/Intel-Lunar-Lake-CPU-analysis-The-Core-Ultra-7-258V-s-multi-core-performance-is-disappointing-but-its-everyday-efficiency-is-good.893405.0.html |website=notebookcheck.net |access-date=11 October 2024 |date=24 September 2024 |quote=After the release of the Snapdragon X Elite chips as well as the AMD Zen 5 CPUs, Intel has finally launched its new Lunar Lake mobile processors. These are completely new chips with a focus on efficiency—plus, Intel has done without hyperthreading for the first time. But how efficient are the new models really and has too much performance perhaps been sacrificed? Updated 04 October 2024 }}

Lunar Lake is the first processor design by Intel where all logic dies are entirely fabricated on external nodes outsourced to TSMC. An analysis by Goldman Sachs indicated that Intel would be spending $5.6 billion in 2024 and $9.7 billion in 2025 outsourcing to TSMC.{{cite web |last=Shilov |first=Anton |date=September 3, 2023 |title=Intel To Spend $9.7 Billion On TSMC Outsourcing In 2025: Goldman Sachs |url=https://www.tomshardware.com/news/intel-to-spend-dollar97-billion-on-tsmc-outsourcing-in-2025-goldman-sachs |website=Tom's Hardware |language=en-US |access-date=June 4, 2024}} In March 2024, Intel's chief financial officer admitted during an investment call that the company was "a little bit heavier than we want to be in terms of external wafer manufacturing versus internal".{{cite web |last=Evanson |first=Nick |date=March 11, 2024 |title=Intel's chief financial officer admits the company is 'heavier than we want to be in terms of external wafer manufacturing' |url=https://www.pcgamer.com/hardware/processors/intels-chief-financial-officer-admits-the-company-is-heavier-than-we-want-to-be-in-terms-of-external-wafer-manufacturing/ |website=PC Gamer |language=en-US |access-date=June 4, 2024}} The following month, Intel disclosed that their foundry business made a $7 billion operating loss during 2023.{{cite web |last=Bajwa |first=Arsheeya |date=April 3, 2024 |title=Intel slides as foundry business loss spotlights wide gap with rival TSMC |url=https://www.reuters.com/markets/intel-slides-foundry-business-loss-spotlights-wide-gap-with-rival-tsmc-2024-04-03/ |website=Reuters |language=en-US |access-date=June 4, 2024}}

The Compute tile is Lunar Lake's largest tile. It has expanded functions over Meteor Lake's compute tile which solely housed CPU cores and cache. Instead, Lunar Lake's compute tile houses CPU cores and their cache, the GPU and the NPU. The previous generation Meteor Lake used the Intel 4 process on its compute tile while Lunar Lake moves to TSMC's N3B node.{{cite web |last1=Hachman |first1=Mark |date=June 3, 2024 |title=Lunar Lake deep-dive: Intel's new laptop CPU is radically different |url=https://www.pcworld.com/article/2350967/intels-lunar-lake-debuts-combining-low-power-performance-and-ai.html |website=PCWorld |language=en-US |access-date=June 4, 2024}} N3B is TSMC's first generation 3 nm node with lower yields compared to the updated N3E node. Lunar Lake's compute tile was originally planned to be built on Intel's 18A node. 18A will not debut until 2025 with Panther Lake mobile processors and Clearwater Forest server processors. Lunar Lake shares the same Lion Cove P-core and Skymont E-core architectures with Arrow Lake desktop and mobile processors.

With the Lion Cove P-core, Intel claims a 14% IPC uplift on average over Redwood Cove. Simultaneous multithreading (SMT) has been removed from Lunar Lake's Lion Cove P-cores.{{cite web |last1=Crider |first1=Michael |date=June 3, 2024 |title=Intel ditches hyperthreading for Lunar Lake CPUs |url=https://www.pcworld.com/article/2355112/intel-ditches-hyperthreading-for-lunar-lake-cpus.html |website=PCWorld |language=en-US |access-date=June 4, 2024}} SMT first made its debut in an Intel desktop processor with the Northwood-based Pentium 4 in 2002. The last x86-64 Intel desktop processor lineup not to feature SMT in any way was Core 2,{{cite web |last1=Sexton |first1=Michael |title=Intel Dumping Hyper-Threading in Its Next-Gen Chips? That Could Be a Good Thing |url=https://web.archive.org/web/20240604034032/https://www.pcmag.com/opinions/intel-dumping-hyper-threading-in-arrow-lake-chips-a-good-thing |website=PC Mag |access-date=4 June 2024}} which was discontinued in 2011{{cite web |last1=Shvets |first1=Anthony |title=Intel discontinues Pentium, Core 2 Duo and Core 2 Quad CPUs |url=https://web.archive.org/web/20151010045552/http://www.cpu-world.com/news_2011/2011020801_Intel_discontinues_Pentium_Core_2_Duo_and_Core_2_Quad_CPUs.html |website=CPU World |access-date=10 October 2015}}{{efn|name="SMT"}}. SMT, or Intel's marketing term HyperThreading, allows a single physical CPU core with 2 threads to execute two tasks simultaneously. In the early 2000s, SMT was a way to add more processing threads to dual and quad-core CPUs while not using too much die space. The removal of SMT allows the physical core die area to be reduced. Increasing the number of processing threads with a greater number of physical cores can compensate for the removal of SMT providing 2 threads per core.{{cite web |last=Sexton |first=Michael Justin Allen |date=March 5, 2024 |title=Intel Dumping Hyper-Threading in Its Next-Gen Chips? That Could Be a Good Thing |url=https://uk.pcmag.com/processors/151318/intel-dumping-hyper-threading-in-its-next-gen-chips-that-could-be-a-good-thing |website=PC Magazine |language=en-GB |access-date=June 4, 2024}} Intel's removal of SMT yields a 15% saving in die area and 5% greater performance-per-watt.{{cite web |title=Intel Lunar Lake Technical Deep Dive - So many Revolutions in One Chip |url=https://www.techpowerup.com/review/intel-lunar-lake-technical-deep-dive/3.html |website=TechPowerUp |language=en-US |date=June 4, 2024 |access-date=June 4, 2024}} To counteract the removal of SMT, Intel prioritized executing more instructions per cycle for high single-threaded performance rather than parallel execution. L2 cache per core for Lion Cove is increased to 2.5 MB from Redwood Cove's 2 MB. Lunar Lake is able to exercise more granular control over Lion Cove's boost clocks. Lion Cove's boost clocks are able to increase in increments of 16.67{{nbsp}}MHz rather than in 100{{nbsp}}MHz increments.

Lunar Lake's cluster of 4 Skymont E-cores exist on a 'Low Power Island' separate from the P-cores. As a result, the E-cores have their own dedicated L3 cache not accessible to the P-cores rather than sitting on a ringbus fabric with P-cores. Intel claims a massive 68% IPC gain in Skymont E-cores over Crestmont.{{cite web |last1=Alcorn |first1=Paul |date=June 3, 2024 |title=Intel unwraps Lunar Lake architecture: Up to 68% IPC gain for E-cores, 16% IPC gain for P-Cores |url=https://www.tomshardware.com/pc-components/cpus/intel-unwraps-lunar-lake-architecture-up-to-68-ipc-gain-for-e-cores-16-ipc-gain-for-p-cores |website=Tom's Hardware |language=en-US |access-date=June 4, 2024}} It achieves this with the inclusion of new 8-wide integer ALUs, doubled from Crestmont.

Lunar Lake's Neural Processing Unit (NPU), which performs AI operations locally, in-silicon rather than in the cloud, has been updated to Intel's "NPU 4" architecture with increased clock speeds. Intel claims that Lunar Lake can achieve a total of 120 TOPS of performance in AI workloads, with 48 TOPS coming from the NPU alone while an additional 67 TOPS come from the GPU and 5 TOPS from the CPU. Lunar Lake's 48 dedicated NPU TOPS meets Microsoft's requirements for laptops in order to be certified as Copilot+ PCs.{{cite web |last1=Hardawar |first1=Devindra |date=June 4, 2024 |title=Intel officially unveils Lunar Lake, its Copilot+ AI PC chip |url=https://www.engadget.com/intel-officially-unveils-lunar-lake-its-copilot-ai-pc-chip-030029548.html?guccounter=1 |website=Engadget |language=en-GB |access-date=June 4, 2024}} Microsoft has mandated 40 TOPs on NPU performance in order to run Copilot locally on Windows PCs.{{cite web |last=Alcorn |first=Paul |date=March 27, 2024 |title=Intel confirms Microsoft's Copilot AI will soon run locally on PCs, next-gen AI PCs require 40 TOPS of NPU performance |url=https://www.tomshardware.com/pc-components/cpus/intel-confirms-microsoft-copilot-will-soon-run-locally-on-pcs-next-gen-ai-pcs-require-40-tops-of-npu-performance |website=Tom's Hardware |language=en-US |access-date=June 4, 2024}} For comparison, the NPU in Meteor Lake and Arrow Lake processors is able to output 10 TOPs.{{cite web |last=Alcorn |first=Paul |date=April 9, 2024 |title=Intel says Lunar Lake will have 100+ TOPS of AI performance — 45 TOPS from the NPU alone meets requirement for next-gen AI PCs |url=https://www.tomshardware.com/pc-components/cpus/intel-says-lunar-lake-will-have-100-tops-of-ai-performance-45-tops-from-the-npu-alone-meeting-requirement-for-next-gen-ai-pcs |website=Tom's Hardware |language=en-US |access-date=June 4, 2024}}

Lunar Lake's GPU features second generation X^e2-LPG cores based on the Battlemage graphics architecture. The Battlemage architecture launched in Lunar Lake mobile processors before discrete Arc desktop graphics cards. It contains eight X^e2-LPG cores that share an 8 MB L2 cache. The GPU is able to provide up to 67 TOPS of INT8 compute for AI processing.{{cite web |last1=Hollister |first1=Sean |date=June 4, 2024 |title=This is Lunar Lake — Intel's utterly overhauled AI laptop chip that ditches memory sticks |url=https://www.theverge.com/2024/6/3/24169115/intel-lunar-lake-architecture-platform-feature-reveal |website=The Verge |language=en-US |access-date=June 4, 2024}} The display engine has three display pipes with HDMI 2.1, DisplayPort 2.1 and a new eDP 1.5 connection. It features H.266 VVC hardware fixed-function decoding support.

The small platform controller tile provides security functions and I/O connectivity including Wi-Fi 7, Thunderbolt 4, 4 PCIe 4.0 lanes and 4 PCIe 5.0 lanes. Lunar Lake's platform controller tile uses the same N6 node from TSMC that is used by Meteor Lake and Arrow Lake's SoC tiles. The platform controller tile in Lunar Lake does not feature two dedicated low power E-cores like those in Meteor Lake and Arrow Lake's SoC tile. This change has been attributed to the power efficiency gains from the compute tile moving from the Intel 4 process to TSMC's more advanced N3B node.{{cite web |title=Intel's next-gen "Skymont" efficient core details leak out |url=https://videocardz.com/newz/intels-next-gen-skymont-efficient-core-details-leak-out |website=VideoCardz |language=en-US |date=May 30, 2024 |access-date=June 4, 2024}}

Lunar Lake features on-package LPDDR5X-8533 RAM available in 16 GB or 32 GB capacities.{{cite web |last1=Norem |first1=Josh |date=May 16, 2024 |title=Intel Lunar Lake Mobile Chips to Feature 16GB or 32GB of Embedded Memory |url=https://www.extremetech.com/computing/intel-lunar-lake-mobile-chips-to-feature-16gb-or-32gb-of-embedded-memory |website=ExtremeTech |language=en-US |access-date=June 4, 2024}} This on-package memory is a similar approach to Apple with its M series SoCs that integrate unified LPDDR memory onto the package beside the CPU silicon.{{cite web |last=Shilov |first=Anton |date=September 6, 2023 |title=Intel Demos Meteor Lake CPU with On-Package LPDDR5X |url=https://www.tomshardware.com/news/intel-demos-meteor-lake-cpu-with-on-package-lpddr5x |website=Tom's Hardware |language=en-US |access-date=}} On-package memory allows the CPU to benefit from higher memory bandwidth at lower power and decreased latency as memory is physically closer to the CPU. Intel claims that Lunar Lake's on-package memory achieved a reduction of 40% in power consumption and "up to 250 square millimeters" of space.{{cite web |last1=Crider |first1=Michael |date=June 3, 2024 |title=Intel's latest laptops get rid of replaceable memory |url=https://www.pcworld.com/article/2355077/lunar-lake-tops-out-at-32gb-ram-will-not-allow-upgrades.html |website=PCWorld |language=en-US |access-date=June 4, 2024}} Furthermore, memory that is integrated onto the CPU package means that the overall processor physical footprint in laptops can be reduced as memory does not need to be placed onto a separate board with its own cooling solution. Less complex cooling being required means that Lunar Lake processors can more easily fit in ultra-low power compact mobile solutions. The downside of Lunar Lake's on-package memory is that is not user replaceable or upgradable to higher capacities beyond 32 GB with SO-DIMMs. Due to the inclusion of on-package memory, an additional 2{{nbsp}}W is added to the TDP of Lunar Lake processors. Lunar Lake processors have a TDP ranging from 17 to 30{{nbsp}}W compared to the 15–28{{nbsp}}W TDP of Meteor Lake-H processors.

=== Mobile processors ===

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• Zen 5 - a competing x86 architecture from AMD
• Arrow Lake

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{{efn|name="SMT"|SMT was physically present in previous Intel core architectures like Sandy Bridge, Haswell and Skylake but it could be disabled from the factory in some lower-end Celeron and Pentium SKUs. For example, Coffee Lake's Skylake cores contained SMT but it was disabled in the Core i7-9700K with 8 cores and 8 threads while the Core i9-9900K had 8 cores and 16 threads.}}

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{{Intel processors}}

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Category:Computer-related introductions in 2024

Category:Intel x86 microprocessors

Category:X86 microarchitectures