Sapphire Rapids#Sapphire Rapids-HBM (High Bandwidth Memory/Xeon Max Series)

Sapphire Rapids has been a long-standing Intel project along Alder Lake in development for over five years and has been subjected to many delays.{{cite web |last1=Patel |first1=Nilay |date=October 4, 2022 |title=Pat Gelsinger came back to turn Intel around — here's how it's going |url=https://www.theverge.com/2022/10/4/23385652/pat-gelsinger-intel-chips-act-ohio-manufacturing-chip-shortage |website=The Verge |language=en-US |access-date=November 10, 2022 |archive-date=November 10, 2022 |archive-url=https://web.archive.org/web/20221110114450/https://www.theverge.com/2022/10/4/23385652/pat-gelsinger-intel-chips-act-ohio-manufacturing-chip-shortage |url-status=live }} It was first announced by Intel at their Investor Meeting in May 2019 with the intention of Sapphire Rapids succeeding Ice Lake and Cooper Lake in 2021.{{cite web |last1=Schor |first1=David |date=May 21, 2019 |title=Leaked Intel Server Roadmap Shows Sapphire Rapids With DDR5/PCIe 5.0 For 2021, Granite Rapids For 2022 |url=https://fuse.wikichip.org/news/2336/leaked-intel-server-roadmap-shows-sapphire-rapids-with-ddr5-pcie-5-0-for-2021-granite-rapids-for-2022/ |website=WikiChip Fuse |language=en-US |access-date=November 29, 2022}}{{cite web |last1=Mujtaba |first1=Hassan |date=May 21, 2019 |title=Intel Xeon Roadmap Leaked Out, Unveils 10nm Ice Lake-SP With PCIe Gen 4 & Up To 26 Cores in 2020, Next-Gen Sapphire Rapids With PCIe Gen 5 & DDR5 in 2021 |url=https://wccftech.com/intel-xeon-roadmap-leak-10nm-ice-lake-sp-2020-sapphire-rapids-sp-2021/ |website=Wccftech |language=en-US |access-date=November 29, 2022}} Intel again announced details on Sapphire Rapids in their August 2021 Architecture Day presentation with no mention of a launch date.{{cite web |author=Intel Technology |date=August 19, 2021 |title=Sapphire Rapids – Architecture Day 2021 {{!}} Intel Technology |url=https://www.youtube.com/watch?v=3zyQNiJw82U&ab_channel=IntelTechnology |website=YouTube |language=en-US |access-date=November 29, 2022}}

Intel CEO Pat Gelsinger tacitly blamed the previous Intel leadership as a reason for Sapphire Rapids' many delays. One industry analyst firm claimed that Intel was having problems with yields from its Intel 7 node with yields of 50–60% on higher core-count silicon.{{cite web |last1=Wheatley |first1=Mike |date=November 1, 2022 |title=Intel's Sapphire Rapids server chips face yet more delays, with AMD set to benefit |url=https://siliconangle.com/2022/11/01/intels-sapphire-rapids-server-chips-face-yet-delays-amd-set-benefit/ |website=Silicon Angle |language=en-US |access-date=November 19, 2022 |archive-date=November 10, 2022 |archive-url=https://web.archive.org/web/20221110205555/https://siliconangle.com/2022/11/01/intels-sapphire-rapids-server-chips-face-yet-delays-amd-set-benefit/ |url-status=live }} Sapphire Rapids was originally scheduled for a launch in the first half of 2022.{{cite web |last1=Cutress |first1=Ian |date=June 29, 2021 |title=Update on Intel Sapphire Rapids in 2022: Q1 for Production, Q2 for Ramp, H1 Launch |url=https://www.anandtech.com/show/16796/update-on-intel-sapphire-rapids-in-2022-q1-for-production-q2-for-ramp-h1-launch |website=AnandTech |language=en-US |access-date=November 10, 2022}} It was later scheduled for release in Q4 2022 but was again delayed to early 2023.{{cite web |last1=Cunningham |first1=Andrew |date=November 2, 2022 |title=Intel's oft-delayed "Sapphire Rapids" Xeon CPUs are finally coming in early 2023 |url=https://arstechnica.com/information-technology/2022/11/intels-oft-delayed-sapphire-rapids-xeon-cpus-are-finally-coming-in-early-2023/ |website=Ars Technica |language=en-US |access-date=November 10, 2022 |archive-date=November 10, 2022 |archive-url=https://web.archive.org/web/20221110113315/https://arstechnica.com/information-technology/2022/11/intels-oft-delayed-sapphire-rapids-xeon-cpus-are-finally-coming-in-early-2023/ |url-status=live }} The specific announcement date of January 10, 2023 was not revealed by Intel until November 2022.{{cite web |last1=Shilov |first1=Anton |date=November 2, 2022 |title=Intel's Sapphire Rapids Formal Launch Date Revealed |url=https://www.tomshardware.com/news/intel-sapphire-rapids-launch-date-revealed |website=Tom's Hardware |language=en-US |access-date=November 10, 2022 |archive-date=November 10, 2022 |archive-url=https://web.archive.org/web/20221110035431/https://www.tomshardware.com/news/intel-sapphire-rapids-launch-date-revealed |url-status=live }}

The server processor lineup was released on January 10, 2023, and the workstation processor lineup was released on February 15, 2023.{{Cite web |title=Intel Launches New Xeon Workstation Processors – the Ultimate... |url=https://www.intel.com/content/www/us/en/newsroom/news/intel-launches-new-xeon-workstation-processors.html |access-date=2023-02-17 |website=Intel |language=en |archive-date=February 16, 2023 |archive-url=https://web.archive.org/web/20230216230607/https://www.intel.com/content/www/us/en/newsroom/news/intel-launches-new-xeon-workstation-processors.html |url-status=live }} Those processors were available for shipping on March 14 of that year.{{Cite web |title=4th Gen Intel Xeon Sprints into the Market |url=https://www.intel.com/content/www/us/en/newsroom/news/4th-gen-intel-xeon-sprints-into-market.html |website=Intel |language=en-US |access-date=April 2, 2023 |archive-date=April 4, 2023 |archive-url=https://web.archive.org/web/20230404043913/https://www.intel.com/content/www/us/en/newsroom/news/4th-gen-intel-xeon-sprints-into-market.html |url-status=live }} Intel shipped the millionth of this generation Xeon processors in 2023.Intel Corporation, [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-future-generation-xeon.html Intel Unveils Future-Generation Xeon with Robust Performance and Efficiency Architectures] {{Webarchive|url=https://web.archive.org/web/20230829185218/https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-future-generation-xeon.html |date=August 29, 2023 }}

{{Further|Golden Cove (microarchitecture)}}

• Up to 60 Golden Cove CPU cores per package{{cite web |last=Cutress |first=Ian |date=August 31, 2021 |title=Intel Xeon Sapphire Rapids: How To Go Monolithic with Tiles |url=https://www.anandtech.com/show/16921/intel-sapphire-rapids-nextgen-xeon-scalable-gets-a-tiling-upgrade |website=AnandTech |language=en-US |access-date=November 10, 2022 |archive-date=October 23, 2022 |archive-url=https://web.archive.org/web/20221023221132/https://www.anandtech.com/show/16921/intel-sapphire-rapids-nextgen-xeon-scalable-gets-a-tiling-upgrade |url-status=live }}
• Up to 15 cores per tile, a 60 core Xeon Platinum 8490H uses 4 dies populated with 15 cores to have 60 cores in total
• AVX512-FP16{{cite web |title=Intel® AVX512-FP16 Architecture Specification, June 2021, Revision 1.0, Ref. 347407-001US |url=https://software.intel.com/content/dam/develop/external/us/en/documents-tps/intel-avx512-fp16.pdf |website=Intel |language=en-US |date=June 30, 2021 |access-date=July 4, 2021 |archive-date=July 1, 2021 |archive-url=https://web.archive.org/web/20210701082037/https://software.intel.com/content/dam/develop/external/us/en/documents-tps/intel-avx512-fp16.pdf |url-status=live }}
• TSX Suspend Load Address Tracking (TSXLDTRK){{cite web |title=Intel® Architecture Instruction Set Extensions and Future Features Programming Reference |url=https://software.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf |website=Intel |language=en-US |date=May 2021 |access-date=November 10, 2022 |archive-date=October 22, 2020 |archive-url=https://web.archive.org/web/20201022100519/https://software.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf |url-status=live }}
• Advanced Matrix Extensions (AMX)
• [https://www.intel.com/content/www/us/en/developer/articles/technical/intel-trust-domain-extensions.html Trust Domain Extensions (TDX)], a collection of technologies to help deploy hardware-isolated virtual machines (VMs) called trust domains (TDs){{Cite web |last=Shah |first=Agam |title=Intel's TDX Goes Through the Grind Ahead of Mass Release to Cloud |url=https://www.enterpriseai.news/2023/04/25/intels-tdx-goes-through-the-grind-ahead-of-mass-release-to-cloud/ |website=EnterpriseAI |date=April 25, 2023 |access-date=May 29, 2023 |archive-date=May 29, 2023 |archive-url=https://web.archive.org/web/20230529172412/https://www.enterpriseai.news/2023/04/25/intels-tdx-goes-through-the-grind-ahead-of-mass-release-to-cloud/ |url-status=live }}
• User Interrupts (UINTR), a new architectural feature allowing interrupts to be delivered to user-mode software without kernel involvement.{{Cite web |last=Larabel |first=Michael |date=April 10, 2023 |title=Intel User Interrupts Still Baking For Linux 6.5+ With Sapphire Rapids |url=https://www.phoronix.com/news/Linux-SPR-Intel-User-Interrupts |access-date=September 1, 2024 |website=Phoronix |language=en-US |archive-date=March 5, 2024 |archive-url=https://web.archive.org/web/20240305070248/https://www.phoronix.com/news/Linux-SPR-Intel-User-Interrupts |url-status=live }}{{Cite web |title=Intel 64 and IA-32 Architectures Software Developers Manual, Volume 3, Chapter 7: User Interrupts |url=https://cdrdv2.intel.com/v1/dl/getContent/671200 |website=Intel |access-date=September 1, 2024 |archive-date=April 25, 2022 |archive-url=https://web.archive.org/web/20220425144301/https://cdrdv2.intel.com/v1/dl/getContent/671200 |url-status=live }}{{Cite web |title=Linux Kernel Patches for User Interrupts |url=https://github.com/intel/uintr-linux-kernel |website=GitHub |access-date=September 1, 2024 |archive-date=September 1, 2024 |archive-url=https://web.archive.org/web/20240901140134/https://github.com/intel/uintr-linux-kernel |url-status=live }}

• In-Field Scan (IFS), a technology that allows for testing the processor for potential hardware faults without taking it completely offline{{Cite web |last=Larabel |first=Michael |date=December 16, 2022 |title=Intel IFS Ready To Weed Out Faulty Silicon With Linux 6.2 |url=https://www.phoronix.com/news/Linux-6.2-x86-Microcode |access-date=January 13, 2023 |website=Phoronix |language=en-US |archive-date=January 13, 2023 |archive-url=https://web.archive.org/web/20230113030500/https://www.phoronix.com/news/Linux-6.2-x86-Microcode |url-status=live }}
• Data Streaming Accelerator (DSA), allows for speeding up data copy and transformation between different kinds of storage{{Cite web |last=Jiang |first=Dave |date=November 20, 2019 |title=Introducing the Intel® Data Streaming Accelerator (Intel® DSA) |url=https://01.org/blogs/2019/introducing-intel-data-streaming-accelerator |access-date=November 10, 2022 |website=01 Intel Open Source |language=en-US |archive-date=November 10, 2022 |archive-url=https://web.archive.org/web/20221110114453/https://01.org/blogs/2019/introducing-intel-data-streaming-accelerator |url-status=live }}{{Cite web |last=Larabel |first=Michael |date=January 13, 2023 |title=Setting Up Intel 4th Gen Xeon Scalable "Sapphire Rapids" For Accelerator Use |url=https://www.phoronix.com/review/intel-accelerators-linux |access-date=January 13, 2023 |website=Phoronix |language=en-US}}
• QuickAssist Technology (QAT), allows for improved performance of compression and encryption tasks
• Dynamic Load Balancer (DLB), allows for offloading tasks of load balancing, packet prioritization and queue management
• In-Memory Analytics Accelerator (IAA), allows accelerating in-memory databases and big data analytics

Not all accelerators are available in all processor models. Some accelerators are available under the Intel On Demand program, also known as Software Defined Silicon (SDSi), where a license is required to activate a given accelerator that is physically present in the processor. The license can be obtained as a one-time purchase or as a paid subscription. Activating the license requires support in the operating system. A driver with the necessary support was added in Linux kernel version 6.2.{{Cite web |last=Larabel |first=Michael |date=November 23, 2022 |title=Intel Details The Accelerators & Security Features For On Demand / Software Defined Silicon |url=https://www.phoronix.com/news/Intel-On-Demand-Details |access-date=January 13, 2023 |website=Phoronix |language=en-US |archive-date=January 13, 2023 |archive-url=https://web.archive.org/web/20230113215441/https://www.phoronix.com/news/Intel-On-Demand-Details |url-status=live }}

• PCI Express 5.0
• Direct Media Interface 4.0
• 8-channel DDR5 ECC memory support up to DDR5-4800, up to 2 DIMMs per channel
• On-package High Bandwidth Memory 2.0e memory as L4 cache on Xeon Max models{{Cite web |last=Shilov |first=Anton |date=December 30, 2020 |title=Intel Confirms On-Package HBM Memory Support for Sapphire Rapids |url=https://www.tomshardware.com/news/sapphire-rapids-hbm |website=Tom's Hardware |language=en-US |access-date=January 1, 2021 |archive-date=January 1, 2021 |archive-url=https://web.archive.org/web/20210101015648/https://www.tomshardware.com/news/sapphire-rapids-hbm |url-status=live }}{{Cite web |last=Cutress |first=Ian |date=November 15, 2021 |title=Intel: Sapphire Rapids With 64 GB of HBM2e, Ponte Vecchio with 408 MB L2 Cache |url=https://www.anandtech.com/show/17067/intel-sapphire-rapids-with-64-gb-of-hbm2e-ponte-vecchio-with-408-mb-l2-cache |website=AnandTech |language=en-US |access-date=November 10, 2022 |archive-date=December 4, 2022 |archive-url=https://web.archive.org/web/20221204230620/https://www.anandtech.com/show/17067/intel-sapphire-rapids-with-64-gb-of-hbm2e-ponte-vecchio-with-408-mb-l2-cache |url-status=live }}
• Compute Express Link 1.1

Sapphire Rapids come in two varieties: the low-core-count variety uses a single die (MCC), and the high-core-count variety uses multiple dies on a single package (XCC).

• Multi-chiplet chip with four tiles linked by 2.5D Embedded Multi-die Interconnect Bridges. Each tile is a 400mm² system on a chip, providing both compute cores and I/O.{{cite web |last1=Tyson |first1=Mark |date=August 19, 2021 |title=Intel Sapphire Rapids utillises tiled, modular SoC architecture |url=https://hexus.net/tech/news/cpu/148266-intel-sapphire-rapids-utillises-tiled-modular-soc-architecture/ |website=Hexus |language=en-GB |access-date=November 19, 2022 |archive-date=November 19, 2022 |archive-url=https://web.archive.org/web/20221119190435/https://hexus.net/tech/news/cpu/148266-intel-sapphire-rapids-utillises-tiled-modular-soc-architecture/ |url-status=live }}
• Each tile contains 15 Golden Cove cores, and a single UPI link
• Each tile's memory controller provides two channels of DDR5 ECC supporting 4 DIMMs (2 per channel) and 1 TB of memory with a maximum of 8 channels, 16 DIMMs, and 4 TB memory across 4 tiles{{cite web |title=Intel "Sapphire Rapids" Xeon 4-tile MCM Annotated |url=https://www.techpowerup.com/292204/intel-sapphire-rapids-xeon-4-tile-mcm-annotated |website=TechPowerUp |language=en-US |date=February 21, 2022 |access-date=November 19, 2022 |archive-date=November 19, 2022 |archive-url=https://web.archive.org/web/20221119190423/https://www.techpowerup.com/292204/intel-sapphire-rapids-xeon-4-tile-mcm-annotated |url-status=live }}
• A tile provides up to 32 PCIe 5.0 lanes, but one of the eight PCIe controllers of a CPU is usually reserved for DMI, resulting in a maximum of 112 non-chipset lanes. This maximum is only reached in the W-3400 series processors, while the server processors have 80 (20 per tile).{{cite web |last1=Kennedy |first1=Patrick |title=New Workstation Kingpins Intel Xeon W-3400 Xeon W-2400 and W790 Launch |url=https://www.servethehome.com/new-workstation-kingpins-intel-xeon-w-3400-xeon-w-2400-and-w790-launch-asus/ |website=ServeTheHome |date=February 15, 2023 |access-date=February 23, 2023 |archive-date=February 23, 2023 |archive-url=https://web.archive.org/web/20230223030619/https://www.servethehome.com/new-workstation-kingpins-intel-xeon-w-3400-xeon-w-2400-and-w790-launch-asus/ |url-status=live }}

Xeon Max processors contain 64 GB of High Bandwidth Memory.

With its maximum of 60 cores, Sapphire Rapids-SP competes with AMD's Epyc 8004/9004 Genoa with up to 96 cores and Bergamo with up to 128 cores. Sapphire Rapids Xeon server processors are scalable from single-socket configurations up to 8 socket configurations.{{cite web |last1=Robinson |first1=Cliff |date=October 6, 2022 |title=Intel Xeon Sapphire Rapids to Scale to 4 and 8 Sockets |url=https://www.servethehome.com/intel-xeon-sapphire-rapids-to-scale-to-4-and-8-sockets/ |website=ServeTheHome |language=en-US |access-date=November 27, 2022 |archive-date=November 27, 2022 |archive-url=https://web.archive.org/web/20221127183900/https://www.servethehome.com/intel-xeon-sapphire-rapids-to-scale-to-4-and-8-sockets/ |url-status=live }}{{cite web |title=Intel 4th Gen Xeon Scalable "Sapphire Rapids" Server Processors Launch in January |url=https://www.techpowerup.com/300576/intel-4th-gen-xeon-scalable-sapphire-rapids-server-processors-launch-in-january |website=TechPowerUp |language=en-US |date=November 2, 2022 |access-date=November 27, 2022 |archive-date=November 27, 2022 |archive-url=https://web.archive.org/web/20221127183900/https://www.techpowerup.com/300576/intel-4th-gen-xeon-scalable-sapphire-rapids-server-processors-launch-in-january |url-status=live }}

Suffixes to denote:{{Cite web |date=19 January 2024 |title=Intel Xeon Scalable Processor Reference for Lenovo ThinkSystem Servers |url=https://lenovopress.lenovo.com/lp1262-intel-xeon-scalable-processor-comparison |archive-url=https://web.archive.org/web/20240223164527/https://lenovopress.lenovo.com/lp1262-intel-xeon-scalable-processor-comparison |access-date=2024-02-23 |website=Lenovo Press |publisher=Lenovo |language=en |archive-date=February 23, 2024 |url-status=live }}

• +: Includes 1 of each of the four accelerators: DSA, IAA, QAT, DLB
• H: Database and analytics workloads, supports 4S (Xeon Gold) and/or 8S (Xeon Platinum) configurations and includes all of the accelerators
• M: Media transcode workloads
• N: Network/5G/Edge workloads (High TPT/Low Latency), some are uniprocessor
• P: Cloud and infrastructure as a service (IaaS) workloads
• Q: Liquid cooling
• S: Storage & Hyper-converged infrastructure (HCI) workloads
• T: Long-life use/High thermal case
• U: Uniprocessor (some workload-specific SKUs may also be uniprocessor)
• V: Optimized for cloud and software as a service (SaaS) workloads, some are uniprocessor
• Y: Speed Select Technology-Performance Profile (SST-PP) enabled (some workload-specific SKUs may also support SST-PP)
• Y+: Speed Select Technology-Performance Profile (SST-PP) enabled and includes 1 of each of the accelerators.

File:20K-Res Gaming! We Challenge The Highest Resolution with The Fastest PC! (极客湾Geekerwan) 04.png

With its maximum of 60 cores, Sapphire Rapids-WS competes with AMD's Threadripper PRO 5000WX Chagall with up to 64 cores.{{cite web |last1=Liu |first1=Zhiye |date=July 23, 2022 |title=Intel Sapphire Rapids Workstation Specs Leaked: Up To 56 Cores, 350W TDP |url=https://www.tomshardware.com/news/intel-xeon-sapphire-rapids-ws-specs-leaked-up-to-56-cores-350w-tdp |website=Tom's Hardware |language=en-US |access-date=November 24, 2022 |archive-date=November 19, 2022 |archive-url=https://web.archive.org/web/20221119175421/https://www.tomshardware.com/news/intel-xeon-sapphire-rapids-ws-specs-leaked-up-to-56-cores-350w-tdp |url-status=live }} Like Intel's Core product segmentation into i3, i5, i7 and i9, Sapphire Rapids-WS is labeled Xeon w3, w5, w7 and w9.{{cite web |last1=Mujtaba |first1=Hassan |date=July 23, 2022 |title=Intel Sapphire Rapids-WS Xeon Workstation CPU Lineup Specs Leaked: Xeon W9 Up To 56 Cores, Xeon W7 Up To 28 Cores, Xeon W5 Up To 16 Cores |url=https://wccftech.com/intel-sapphire-rapids-ws-xeon-workstation-cpu-lineup-specs-leaked-xeon-w9-up-to-56-cores-xeon-w7-up-to-28-cores-xeon-w5-up-to-16-cores/ |website=Wccftech |language=en-US |access-date=November 24, 2022 |archive-date=November 24, 2022 |archive-url=https://web.archive.org/web/20221124172429/https://wccftech.com/intel-sapphire-rapids-ws-xeon-workstation-cpu-lineup-specs-leaked-xeon-w9-up-to-56-cores-xeon-w7-up-to-28-cores-xeon-w5-up-to-16-cores/ |url-status=live }} Sapphire Rapids-WS was unveiled in February 2023, and was made available for OEMs in March.{{Cite web |title=Intel Launches New Xeon Workstation Processors – the Ultimate Solution for Professionals |url=https://www.intel.com/content/www/us/en/newsroom/news/intel-launches-new-xeon-workstation-processors.html |website=Intel |language=en-US |access-date=February 16, 2023 |archive-date=February 15, 2023 |archive-url=https://web.archive.org/web/20230215225351/https://www.intel.com/content/www/us/en/newsroom/news/intel-launches-new-xeon-workstation-processors.html |url-status=live }}{{Cite web |last=Chiappetta |first=Marco |date=February 16, 2023 |title=New Intel Xeon W Processors Offer Massive Performance Boosts For High-End Desktops And Workstations |url=https://www.forbes.com/sites/marcochiappetta/2023/02/16/new-intel-xeon-w-processors-offer-massive-performance-boosts-for-high-end-desktops-and-workstations/ |website=Forbes |language=en-US |access-date=February 16, 2023 |archive-date=February 16, 2023 |archive-url=https://web.archive.org/web/20230216213418/https://www.forbes.com/sites/marcochiappetta/2023/02/16/new-intel-xeon-w-processors-offer-massive-performance-boosts-for-high-end-desktops-and-workstations/ |url-status=live }} CPUs with "X" suffix have its multiplier unlocked for overclocking.{{Cite web |last=Alcorn |first=Paul |date=February 15, 2023 |title=Intel Launches Overclockable Xeon W CPUs up to 56 Cores: a Return to HEDT-Class Chips |url=https://www.tomshardware.com/news/intel-xeon-w-3400-w-2400-cpu-launch-hedt-overclock |website=Tom's Hardware |language=en |access-date=February 16, 2023 |archive-date=February 15, 2023 |archive-url=https://web.archive.org/web/20230215192351/https://www.tomshardware.com/news/intel-xeon-w-3400-w-2400-cpu-launch-hedt-overclock |url-status=live }}

• No suffix letter: Locked clock multiplier
• X: Unlocked clock multiplier (adjustable with no ratio limit)
• Xeon W-2400/2500 uses a monolithic design and supports up to 64 PCI Express 5.0 lanes, while Xeon W-3400/3500 uses a chiplet design and supports up to 112 lanes. Both support 8 DMI 4.0 lanes.

• Intel's process–architecture–optimization model
• Intel's tick–tock model
• List of Intel CPU microarchitectures

{{Reflist}}

{{Intel processors}}

{{Intel processor roadmap}}

Category:Intel products

Category:Intel microprocessors