History of supercomputing

The term "Super Computing" was first used in the New York World in 1929{{cite book |last1=Eames |first1=Charles |last2=Eames |first2=Ray |title=A Computer Perspective |year=1973 |publisher=Harvard University Press |location= Cambridge, Mass |pages = 95 }}. Page 95 identifies the article as {{cite news |title= Super Computing Machines Shown |publisher=New York World |date= March 1, 1920 }}. However, the article shown on page 95 references the Statistical Bureau in Hamilton Hall, and an article at the Columbia Computing History web site states that such did not exist until 1929. See [http://www.columbia.edu/acis/history/packard.html The Columbia Difference Tabulator - 1931] to refer to large custom-built tabulators that IBM had made for Columbia University.{{cite web | url=http://www.columbia.edu/cu/computinghistory/statlab-clipping.jpg|title= Super Computing Machines Shown (in New York World) | year = 1920| access-date = 26 February 2024}}

There were several lines of second generation computers that were substantially faster than most contemporary mainframes. These included

• Atlas
• UNIVAC LARC
• IBM 7030
• IBM 360/91
• IBM 360/95
• CDC 6600

The second generation saw the introduction of features intended to support multiprogramming and multiprocessor configurations, including master/slave (supervisor/problem) mode, storage protection keys, limit registers, protection associated with address translation, and atomic instructions.

In 1957, a group of engineers left Sperry Corporation to form Control Data Corporation (CDC) in Minneapolis, Minnesota. Seymour Cray left Sperry a year later to join his colleagues at CDC.{{cite book | title = Hardware software co-design of a multimedia SOC platform | first1 = Sao-Jie | last1 = Chen | first2 = Guang-Huei | last2 = Lin | first3 = Pao-Ann | last3 = Hsiung | first4 = Yu-Hen | last4 = Hu | year = 2009 | isbn = 9781402096235 | pages = 70–72 | url = https://books.google.com/books?id=OXyo3om9ZOkC&pg=PA70 | publisher = Springer Science+Business Media | access-date = 20 February 2018}} In 1960, Cray completed the CDC 1604, one of the first generation of commercially successful transistorized computers and at the time of its release, the fastest computer in the world.{{cite book | title = Wisconsin Biographical Dictionary | first = Caryn | last = Hannan | year = 2008 | isbn = 978-1-878592-63-7 | pages = 83–84 | publisher = State History Publications | url = https://books.google.com/books?id=V08bjkJeXkAC&pg=PA83 | access-date = 20 February 2018}} However, the sole fully transistorized Harwell CADET was operational in 1951, and IBM delivered its commercially successful transistorized IBM 7090 in 1959.

File:CDC 6600 introduced in 1964.jpg with the system console]]

Around 1960, Cray decided to design a computer that would be the fastest in the world by a large margin. After four years of experimentation along with Jim Thornton, and Dean Roush and about 30 other engineers, Cray completed the CDC 6600 in 1964. Cray switched from germanium to silicon transistors, built by Fairchild Semiconductor, that used the planar process. These did not have the drawbacks of the mesa silicon transistors. He ran them very fast, and the speed of light restriction forced a very compact design with severe overheating problems, which were solved by introducing refrigeration, designed by Dean Roush.{{cite book | title = The Supermen | first = Charles J. | last = Murray | publisher = Wiley & Sons | year = 1997 | isbn = 9780471048855 | url = https://books.google.com/books?id=VsA86kiUkC0C}} The 6600 outperformed the industry's prior recordholder, the IBM 7030 Stretch,{{clarify|reason=How did the Stretch compare to the Atlas, numbers anybody? (see talk page)|date=January 2022}} by a factor of three."Designed by Seymour Cray, the CDC 6600 was almost three times faster than the next fastest machine of its day, the IBM 7030 Stretch." {{cite book

|title=Making a World of Difference: Engineering Ideas into Reality

|url=https://books.google.com/books?isbn=0309312655 |isbn=978-0309312653

|publisher=National Academy of Engineering |date=2014}}"In 1964 Cray's CDC 6600 replaced Stretch as the fastest computer on Earth." {{cite book

|title=Expert Systems, Knowledge Engineering for Human Replication

|url=https://books.google.com/books?isbn=1291595090 |isbn=978-1291595093 |last=Sofroniou |first=Andreas |date=2013| publisher=Lulu.com }} With performance of up to three megaFLOPS,{{cite web

| url=http://www.extremetech.com/extreme/125271-the-history-of-supercomputers

| first1= Sebastian | last1=Anthony

| title=The History of Supercomputers

| date=April 10, 2012 |access-date= 2015-02-02

| website=ExtremeTech}}{{cite web

| url=http://www.britannica.com/EBchecked/topic/899655/CDC-6600

|author=

| title=CDC 6600

| access-date=2015-02-02

| website=Encyclopædia Britannica}} it was dubbed a supercomputer and defined the supercomputing market when two hundred computers were sold at $9 million each.{{cite book | title = A history of modern computing | publisher = MIT Press | first = Paul E. | last = Ceruzzi | year = 2003 | isbn = 978-0-262-53203-7 | page = [https://archive.org/details/historyofmodernc00ceru_0/page/161 161] | url = https://archive.org/details/historyofmodernc00ceru_0 | url-access = registration | access-date = 20 February 2018}}

The 6600 gained speed by "farming out" work to peripheral computing elements, freeing the CPU (Central Processing Unit) to process actual data. The Minnesota FORTRAN compiler for the machine was developed by Liddiard and Mundstock at the University of Minnesota and with it the 6600 could sustain 500 kiloflops on standard mathematical operations.{{cite journal | doi = 10.1145/361598.361914 | last =Frisch | first = Michael J. | date = December 1972 | title = Remarks on algorithm 352 [S22], algorithm 385 [S13], algorithm 392 [D3] | journal = Communications of the ACM | volume = 15 | issue = 12 | page = 1074| s2cid =6571977 | doi-access = free }} In 1968, Cray completed the CDC 7600, again the fastest computer in the world. At 36 MHz, the 7600 had 3.6 times the clock speed of the 6600, but ran significantly faster due to other technical innovations. They sold only about 50 of the 7600s, not quite a failure. Cray left CDC in 1972 to form his own company. Two years after his departure CDC delivered the STAR-100, which at 100 megaflops was three times the speed of the 7600. Along with the Texas Instruments ASC, the STAR-100 was one of the first machines to use vector processing⁠{{nowrap|{{px2}}{{mdash}}{{px2}}}}the idea having been inspired around 1964 by the APL programming language.{{cite book | title = An Introduction to high-performance scientific computing | first = Lloyd Dudley | last = Fosdick | year = 1996 | isbn = 0-262-06181-3 | page = [https://archive.org/details/introductiontohi00fosd/page/418 418] | url = https://archive.org/details/introductiontohi00fosd | url-access = registration | publisher = MIT Press}}

File:University of Manchester Atlas, January 1963.JPG in January 1963.]]

In 1956, a team at Manchester University in the United Kingdom began development of MUSE⁠{{nowrap|{{px2}}{{mdash}}{{px2}}}}a name derived from microsecond {{nowrap|engine{{px2}}{{mdash}}{{px2}}}}with the aim of eventually building a computer that could operate at processing speeds approaching one microsecond per instruction, about one million instructions per second.{{cite web |title=The Atlas |url=http://www.computer50.org/kgill/atlas/atlas.html |publisher=University of Manchester |access-date=21 September 2010 |url-status=dead |archive-url=https://web.archive.org/web/20120728105352/http://www.computer50.org/kgill/atlas/atlas.html |archive-date=28 July 2012 }} Mu (the name of the Greek letter μ) is a prefix in the SI and other systems of units denoting a factor of 10⁻⁶ (one millionth).

At the end of 1958, Ferranti agreed to collaborate with Manchester University on the project, and the computer was shortly afterwards renamed Atlas, with the joint venture under the control of Tom Kilburn. The first Atlas was officially commissioned on 7 December {{nowrap|1962{{px2}}{{mdash}}{{px2}}}}nearly three years before the Cray CDC 6600 supercomputer was {{nowrap|introduced{{px2}}{{mdash}}{{px2}}}}as one of the world's first supercomputers. It was considered at the time of its commissioning to be the most powerful computer in the world, equivalent to four IBM 7094s. It was said that whenever Atlas went offline half of the United Kingdom's computer capacity was lost.{{cite book |last=Lavington |first=Simon Hugh |title=A History of Manchester Computers |year=1998 |edition=2 |publisher=The British Computer Society |location=Swindon |isbn=978-1-902505-01-5 |pages=41–52 |url=https://books.google.com/books?id=rVnxAAAAMAAJ}} The Atlas pioneered virtual memory and paging as a way to extend its working memory by combining its 16,384 words of primary core memory with an additional 96K words of secondary drum memory.{{citation | first = R. J. | last = Creasy | url = http://pages.cs.wisc.edu/~stjones/proj/vm_reading/ibmrd2505M.pdf | title = The Origin of the VM/370 Time-Sharing System | work = IBM Journal of Research & Development | volume = 25 | number = 5 | date = September 1981 | page = 486 }} Atlas also pioneered the Atlas Supervisor, "considered by many to be the first recognizable modern operating system".

File:Cray2.jpeg-cooled Cray-2 supercomputer]]

Four years after leaving CDC, Cray delivered the 80 MHz Cray-1 in 1976, and it became the most successful supercomputer in history.{{cite book | title = Readings in computer architecture | first1 = Mark Donald | last1 = Hill |author-link2=Norman Jouppi | first2 = Norman Paul | last2 = Jouppi | first3 = Gurindar | last3 = Sohi | year = 1999 | isbn = 978-1-55860-539-8 | pages = 41–48| publisher = Gulf Professional }} The Cray-1, which used integrated circuits with two gates per chip, was a vector processor. It introduced a number of innovations, such as chaining, in which scalar and vector registers generate interim results that can be used immediately, without additional memory references which would otherwise reduce computational speed.{{cite book | title = Parallel computing for real-time signal processing and control | url = https://archive.org/details/parallelcomputin00phdm | url-access = limited | first1 = M. O. | last1 = Tokhi | first2 = Mohammad Alamgir | last2 = Hossain | year = 2003 | isbn = 978-1-85233-599-1 | pages = [https://archive.org/details/parallelcomputin00phdm/page/n209 201]-202| publisher = Springer }} The Cray X-MP (designed by Steve Chen) was released in 1982 as a 105 MHz shared-memory parallel vector processor with better chaining support and multiple memory pipelines. All three floating point pipelines on the X-MP could operate simultaneously. By 1983 Cray and Control Data were supercomputer leaders; despite its lead in the overall computer market, IBM was unable to produce a profitable competitor.{{Cite magazine |last=Greenwald |first=John |date=1983-07-11 |title=The Colossus That Works |url=http://content.time.com/time/magazine/article/0,9171,949693-2,00.html |url-status=live |url-access=subscription | magazine=Time |archive-url=https://web.archive.org/web/20080514004334/http://www.time.com/time/magazine/article/0,9171,949693-2,00.html |archive-date=2008-05-14 |access-date=2019-05-18}}

The Cray-2, released in 1985, was a four-processor liquid cooled computer totally immersed in a tank of Fluorinert, which bubbled as it operated. It reached 1.9 gigaflops and was the world's fastest supercomputer, and the first to break the gigaflop barrier.Due to Soviet propaganda, it can be read sometimes that the Soviet supercomputer M13 was the first to reach the gigaflops barrier. Actually, the M13 construction began in 1984, but it was not operational before 1986. [https://www.computer-museum.ru/english/galglory_en/Rogachev.php Rogachev Yury Vasilievich, Russian Virtual Computer Museum] The Cray-2 was a totally new design. It did not use chaining and had a high memory latency, but used much pipelining and was ideal for problems that required large amounts of memory. The software costs in developing a supercomputer should not be underestimated, as evidenced by the fact that in the 1980s the cost for software development at Cray came to equal what was spent on hardware.{{cite book | title = Knowing machines: essays on technical change | first = Donald | last = MacKenzie | year = 1998 | isbn = 0-262-63188-1 | pages = 149–151| publisher = MIT Press| url=https://archive.org/details/knowingmachinese0000mack/} }} That trend was partly responsible for a move away from the in-house, Cray Operating System to UNICOS based on Unix.

The Cray Y-MP, also designed by Steve Chen, was released in 1988 as an improvement of the X-MP and could have eight vector processors at 167 MHz with a peak performance of 333 megaflops per processor. In the late 1980s, Cray's experiment on the use of gallium arsenide semiconductors in the Cray-3 did not succeed. Seymour Cray began to work on a massively parallel computer in the early 1990s, but died in a car accident in 1996 before it could be completed. Cray Research did, however, produce such computers.{{cite book | title = Milestones in computer science and information technology | url = https://archive.org/details/milestonesincomp0000reil | url-access = registration | first = Edwin D. | last = Reilly | year = 2003 | isbn = 1-57356-521-0 | page = [https://archive.org/details/milestonesincomp0000reil/page/65 65]| publisher = Bloomsbury Academic }}

The Cray-2 which set the frontiers of supercomputing in the mid to late 1980s had only 8 processors. In the 1990s, supercomputers with thousands of processors began to appear. Another development at the end of the 1980s was the arrival of Japanese supercomputers, some of which were modeled after the Cray-1.

During the first half of the Strategic Computing Initiative, some massively parallel architectures were proven to work, such as the WARP systolic array, message-passing MIMD like the Cosmic Cube hypercube, SIMD like the Connection Machine, etc. In 1987, a TeraOPS Computing Technology Program was proposed, with a goal of achieving 1 teraOPS (a trillion operations per second) by 1992, which was considered achievable by scaling up any of the previously proven architectures.{{Cite book |last1=Roland |first1=Alex |title=Strategic computing: DARPA and the quest for machine intelligence, 1983 - 1993 |last2=Shiman |first2=Philip |date=2002 |publisher=MIT Press |isbn=978-0-262-18226-3 |series=History of computing |location=Cambridge, Mass. |pages=296}}

File:Paragon XP-E - mesh.jpg cabinet showing the bus bars and mesh routers]]

The SX-3/44R was announced by NEC Corporation in 1989 and a year later earned the fastest-in-the-world title with a four-processor model.{{cite book | title = Computing methods in applied sciences and engineering | first1 = R. | last1 = Glowinski | first2 = A. | last2 = Lichnewsky | date = January 1990 | isbn = 0-89871-264-5 | pages = 353–360}} However, Fujitsu's Numerical Wind Tunnel supercomputer used 166 vector processors to gain the top spot in 1994. It had a peak speed of 1.7 gigaflops per processor.{{cite web | url = http://www.netlib.org/benchmark/top500/reports/report94/main.html | title = TOP500 Annual Report 1994 | date = 1 October 1996}}{{Cite conference |first1=N. |last1= Hirose |first2= M. |last2= Fukuda |year=1997 |title=Numerical Wind Tunnel (NWT) and CFD Research at National Aerospace Laboratory |conference=Proceedings of HPC-Asia '97 |publisher=IEEE Computer Society |doi=10.1109/HPC.1997.592130}} The Hitachi SR2201 obtained a peak performance of 600 gigaflops in 1996 by using 2,048 processors connected via a fast three-dimensional crossbar network.{{cite conference | first1 = H. | last1 = Fujii | first2 = Y. | last2 = Yasuda | first3 = H. | last3 = Akashi | first4 = Y. | last4 = Inagami | first5 = M. | last5 = Koga | first6 = O. | last6 = Ishihara | first7 = M. | last7 = Kashiyama | first8 = H. | last8 = Wada | first9 = T. | last9 = Sumimoto | title = Architecture and performance of the Hitachi SR2201 massively parallel processor system |work = Proceedings of 11th International Parallel Processing Symposium | date = April 1997 | pages = 233–241 | doi = 10.1109/IPPS.1997.580901| isbn = 0-8186-7793-7 }}{{cite journal | first = Y. | last = Iwasaki | title = The CP-PACS project | journal = Nuclear Physics B - Proceedings Supplements | volume = 60 | issue = 1–2 | date = January 1998 | pages = 246–254 | doi = 10.1016/S0920-5632(97)00487-8| arxiv = hep-lat/9709055 | bibcode = 1998NuPhS..60..246I }}A.J. van der Steen, Overview of recent supercomputers, Publication of the NCF, Stichting Nationale Computer Faciliteiten, the Netherlands, January 1997.

In the same timeframe the Intel Paragon could have 1,000 to 4,000 Intel i860 processors in various configurations, and was ranked the fastest in the world in 1993. The Paragon was a MIMD machine which connected processors via a high speed two-dimensional mesh, allowing processes to execute on separate nodes; communicating via the Message Passing Interface.{{cite book | title = Scalable input/output: achieving system balance | first = Daniel A. | last = Reed | year = 2003 | isbn = 978-0-262-68142-1 | page = 182| publisher = MIT Press }} By 1995, Cray was also shipping massively parallel systems, e.g. the Cray T3E with over 2,000 processors, using a three-dimensional torus interconnect.{{cite press release | title = Cray Sells First T3E-1350 Supercomputer to PhillipsPetroleum | agency = Business Wire | publisher = Gale Group | date = 7 August 2000 | url = https://www.thefreelibrary.com/Cray+Sells+First+T3E-1350+Supercomputer+to+Phillips+Petroleum.-a063900928 | location = Seattle }}{{cite journal|first=N. R.|last=Agida|collaboration = et al.|title=Blue Gene/L Torus Interconnection Network|journal=IBM Journal of Research and Development|volume=45|number=2–3|date=March–May 2005|page=265|url=http://www.cc.gatech.edu/classes/AY2008/cs8803hpc_spring/papers/bgLtorusnetwork.pdf |access-date=9 February 2012 |url-status=dead |archive-url=https://web.archive.org/web/20110815102821/http://www.cc.gatech.edu/classes/AY2008/cs8803hpc_spring/papers/bgLtorusnetwork.pdf |archive-date=15 August 2011 }}

The Paragon architecture soon led to the Intel ASCI Red supercomputer in the United States, which held the top supercomputing spot to the end of the 20th century as part of the Advanced Simulation and Computing Initiative. This was also a mesh-based MIMD massively-parallel system with over 9,000 compute nodes and well over 12 terabytes of disk storage, but used off-the-shelf Pentium Pro processors that could be found in everyday personal computers. ASCI Red was the first system ever to break through the 1 teraflop barrier on the MP-Linpack benchmark in 1996; eventually reaching 2 teraflops.{{cite journal | journal = Algorithms for Parallel Processing | title = Enabling Department-Scale Supercomputing | volume = 105 | first = David S. | last = Greenberg | editor-first = Michael T. | editor-last = Heath | year = 1998 | isbn = 0-387-98680-4 | page = 323 | url = https://books.google.com/books?id=zo61nbirb_gC&pg=PA323 | access-date = 20 February 2018}}

{{Main|Petascale computing}}

Image:IBM Blue Gene P supercomputer.jpg/P supercomputer at Argonne National Laboratory]]

Significant progress was made in the first decade of the 21st century. The efficiency of supercomputers continued to increase, but not dramatically so. The Cray C90 used 500 kilowatts of power in 1991, while by 2003 the ASCI Q used 3,000 kW while being 2,000 times faster, increasing the performance per watt 300 fold.{{cite journal | first = Wu-chun | last = Feng | title = Making a Case for Efficient Supercomputing | journal = ACM Queue | volume = 1 | issue = 7 | date = 1 October 2003 | pages = 54–64 | doi = 10.1145/957717.957772 | s2cid = 11283177 | doi-access = free }}

In 2004, the Earth Simulator supercomputer built by NEC at the Japan Agency for Marine-Earth Science and Technology (JAMSTEC) reached 35.9 teraflops, using 640 nodes, each with eight proprietary vector processors.{{cite journal | first = Tetsuya | last = Sato | title = The Earth Simulator: Roles and Impacts | journal = Nuclear Physics B: Proceedings Supplements | page = 102 | volume = 129 | doi = 10.1016/S0920-5632(03)02511-8 | year = 2004| bibcode = 2004NuPhS.129..102S }}

The IBM Blue Gene supercomputer architecture found widespread use in the early part of the 21st century, and 27 of the computers on the TOP500 list used that architecture. The Blue Gene approach is somewhat different in that it trades processor speed for low power consumption so that a larger number of processors can be used at air cooled temperatures. It can use over 60,000 processors, with 2048 processors "per rack", and connects them via a three-dimensional torus interconnect.{{cite conference | title = Early Experience with Scientific Applications on the Blue Gene/L Supercomputer | first = George | last = Almasi | collaboration = et al. | work = Euro-Par 2005 parallel processing: 11th International Euro-Par Conference | editor1-first = José Cardoso | editor1-last = Cunha | editor2-first = Pedro D. | editor2-last = Medeiros | year = 2005 | pages = 560–567 | isbn = 9783540319252 | url = https://books.google.com/books?id=RCEHCAAAQBAJ&pg=PA560}}{{cite news | title = IBM uncloaks 20 petaflops BlueGene/Q super | url = https://www.theregister.co.uk/2010/11/22/ibm_blue_gene_q_super/ | work = The Register | date = 22 November 2010 | first = Timothy Prickett | last = Morgan}}

Progress in China has been rapid, in that China placed 51st on the TOP500 list in June 2003; this was followed by 14th in November 2003, 10th in June 2004, then 5th during 2005, before gaining the top spot in 2010 with the 2.5 petaflop Tianhe-I supercomputer.{{cite book | title = Getting up to speed: the future of supercomputing | url = https://archive.org/details/gettinguptospeed00grah | url-access = limited | first1 = Susan L. | last1 = Graham |first2 = Marc | last2 = Snir | first3 =Cynthia A. | last3 = Patterson | year = 2005 | isbn =0-309-09502-6 | page=[https://archive.org/details/gettinguptospeed00grah/page/n204 188]| publisher = National Academies Press }}{{cite news | url = https://www.nytimes.com/2010/10/28/technology/28compute.html | title = China Wrests Supercomputer Title From U.S. | work = The New York Times | first = Ashlee | last = Vance |author-link=Ashlee Vance | date = 28 October 2010 | access-date = 20 February 2018}}

In July 2011, the 8.1 petaflop Japanese K computer became the fastest in the world, using over 60,000 SPARC64 VIIIfx processors housed in over 600 cabinets. The fact that the K computer is over 60 times faster than the Earth Simulator, and that the Earth Simulator ranks as the 68th system in the world seven years after holding the top spot, demonstrates both the rapid increase in top performance and the widespread growth of supercomputing technology worldwide.{{cite news|url=https://www.telegraph.co.uk/technology/news/8586655/Japanese-supercomputer-K-is-worlds-fastest.html|title=Japanese supercomputer 'K' is world's fastest|access-date=20 June 2011|work=The Telegraph|date=20 June 2011}}{{cite news|url=https://www.nytimes.com/2011/06/20/technology/20computer.html|title=Japanese 'K' Computer Is Ranked Most Powerful|access-date=20 June 2011|work=The New York Times|date=20 June 2011}}{{cite web|url=http://www.fujitsu.com/global/news/pr/archives/month/2011/20110620-02.html|title=Supercomputer 'K computer' Takes First Place in World|access-date=20 June 2011|publisher=Fujitsu}} By 2014, the Earth Simulator had dropped off the list and by 2018 the K computer had dropped out of the top 10. By 2018, Summit had become the world's most powerful supercomputer, at 200 petaFLOPS. In 2020, the Japanese once again took the top spot with the Fugaku supercomputer, capable of 442 PFLOPS. Finally, starting in 2022 and until the present ({{as of|December 2023|lc=y}}), the world's fastest supercomputer had become the Hewlett Packard Enterprise Frontier, also known as the OLCF-5 and hosted at the Oak Ridge Leadership Computing Facility (OLCF) in Tennessee, United States. The Frontier is based on the Cray EX, is the world's first exascale supercomputer, and uses only AMD CPUs and GPUs; it achieved an Rmax of 1.102 exaFLOPS, which is 1.102 quintillion operations per second.{{cite web |last1=Wells |first1=Jack |date=March 19, 2018 |title=Powering the Road to National HPC Leadership |url=https://www.youtube.com/watch?v=9tmWN9PR-ZU&t=2h24m41s |publisher=OpenPOWER Summit 2018 |access-date=March 25, 2018 |archive-date=August 4, 2020 |archive-url=https://web.archive.org/web/20200804004021/https://www.youtube.com/watch?v=9tmWN9PR-ZU&t=2h24m41s |url-status=live }}{{cite web |last1=Bethea |first1=Katie |date=February 13, 2018 |title=Frontier: OLCF'S Exascale Future – Oak Ridge Leadership Computing Facility |url=https://www.olcf.ornl.gov/2018/02/13/frontier-olcfs-exascale-future/ |url-status=live |archive-url=https://web.archive.org/web/20180310203823/https://www.olcf.ornl.gov/2018/02/13/frontier-olcfs-exascale-future/ |archive-date=March 10, 2018 |website=Oak Ridge National Laboratory - Leadership Computing Facility}}{{Cite web |date=October 9, 2020 |title=DOE Under Secretary for Science Dabbar's Exascale Update |url=https://insidehpc.com/2020/10/doe-under-secretary-for-science-dabbars-exascale-update-frontier-to-be-first-aurora-to-be-monitored/ |url-status=live |archive-url=https://web.archive.org/web/20201028093045/https://insidehpc.com/2020/10/doe-under-secretary-for-science-dabbars-exascale-update-frontier-to-be-first-aurora-to-be-monitored/ |archive-date=October 28, 2020 |website=insideHPC}}{{cite news |author=Don Clark |date=May 30, 2022 |title=U.S. Retakes Top Spot in Supercomputer Race |work=The New York Times |url=https://www.nytimes.com/2022/05/30/business/us-supercomputer-frontier.html |access-date=June 1, 2022 |archive-date=June 1, 2022 |archive-url=https://web.archive.org/web/20220601230913/https://www.nytimes.com/2022/05/30/business/us-supercomputer-frontier.html |url-status=live }}{{cite news |last1=Larabel |first1=Michael |title=AMD-Powered Frontier Supercomputer Tops Top500 At 1.1 Exaflops, Tops Green500 Too |url=https://www.phoronix.com/scan.php?page=news_item&px=Top500-Green500-Frontier |access-date=June 1, 2022 |website=Phoronix |date=May 30, 2022 |language=en |archive-date=June 6, 2022 |archive-url=https://web.archive.org/web/20220606064113/https://www.phoronix.com/scan.php?page=news_item&px=Top500-Green500-Frontier |url-status=live }}

{{Main list|List of fastest computers}}

This is a list of the computers which appeared at the top of the TOP500 list since 1993.{{cite web |url=https://www.top500.org/statistics/sublist/ |title=Sublist Generator |publisher=Top500 |year=2017 |access-date=20 February 2018}} The "Peak speed" is given as the "Rmax" rating.

[[File:Supercomputers-history.svg|thumb|right|350px|Rapid growth of supercomputers performance, based on data from top500.org site. The logarithmic y-axis shows performance in GFLOPS.

{{legend|DarkBlue|Combined performance of 500 largest supercomputers}}

{{legend|Red|Fastest supercomputer}}

{{legend|Yellow|Supercomputer in 500th place}}

]]

The CoCom and its later replacement, the Wassenaar Arrangement, legally regulated, i.e. required licensing and approval and record-keeping; or banned entirely, the export of high-performance computers (HPCs) to certain countries. Such controls have become harder to justify, leading to loosening of these regulations. Some have argued these regulations were never justified.{{cite book | url = http://www.princeton.edu/~ota/disk1/1994/9408/940810.PDF | section = Complexities of Setting Export Control Thresholds: Computers | title = Export controls and nonproliferation policy | publisher = DIANE Publishing | isbn = 9781428920521 | date = May 1994}}{{cite journal | first1 = Peter | last1 = Wolcott | first2 = Seymour | last2 = Goodman | first3 = Patrick | last3 = Homer | url = http://www.isqa.unomaha.edu/wolcott/Publications/vpcacm.htm | title = High Performance Computing Export Controls: Navigating Choppy Waters | journal = Communications of the ACM | date = November 1998 | volume = 41 | issue = 11 | pages = 27–30 | doi = 10.1145/287831.287836 | location = New York, USA| s2cid = 18519822 | doi-access = free }}{{cite report | first1 = Glenn J. | last1 = McLoughlin | first2 = Ian F. | last2 = Fergusson | url = http://www.fas.org/sgp/crs/RL31175.pdf | title = High Performance Computers and Export Control Policy | date = 10 February 2003}}{{cite web | first = Seth | last = Brugger | url = http://www.armscontrol.org/act/2000_09/exportsept00 | title = U.S. Revises Computer Export Control Regulations | date = 1 September 2000 | website = Arms Control Association}}{{cite web | url = https://www.federalregister.gov/articles/2011/06/24/2011-15842/export-controls-for-high-performance-computers-wassenaar-arrangement-agreement-implementation-for | title = Export Controls for High Performance Computers | date = 24 June 2011}}{{cite news | first = Jeff | last = Blagdon | url = https://www.theverge.com/2013/5/30/4381592/us-removes-sanctions-on-computer-exports-to-iran | title = US removes sanctions on computer exports to Iran | date = 30 May 2013}}

• {{Annotated link|FLOPS}}
• {{annotated link|Green500}}
• {{annotated link|Instructions per second}}
• {{annotated link|Quasi-opportunistic supercomputing}}
• Supercomputer architecture
• Supercomputing in China
• Supercomputing in Europe
• Supercomputing in India
• Supercomputing in Japan
• Supercomputing in Pakistan

• [https://www.computerhistory.org/visiblestorage/1960s-1980s/supercomputers/ Supercomputers (1960s-1980s)] at the Computer History Museum

Category:Supercomputers

Supercomputing

Supercomputing

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