microprocessor chronology
{{Short description|Timeline of microprocessors}}
{{See also|Microprocessor#History}}
File:Comparison semiconductor process nodes.svg nodes with some microscopic objects and visible light wavelengths]]
1970s
The first chips that could be considered microprocessors were designed and manufactured in the late 1960s and early 1970s, including the MP944 used in the F-14 CADC.{{Cite web |last=Laws |first=David |date=2018-09-20 |title=Who Invented the Microprocessor? |url=https://computerhistory.org/blog/who-invented-the-microprocessor/ |access-date=2024-01-19 |website=Computer History Museum |language=en}} Intel's 4004 of 1971 is widely regarded as the first commercial microprocessor.{{cite web|url=http://www.intel.co.uk/content/www/uk/en/history/museum-story-of-intel-4004.html|title=The Story of the Intel 4004|website=Intel}}
Designers predominantly used MOSFET transistors with pMOS logic in the early 1970s, switching to nMOS logic after the mid-1970s. nMOS had the advantage that it could run on a single voltage, typically +5V, which simplified the power supply requirements and allowed it to be easily interfaced with the wide variety of +5V transistor-transistor logic (TTL) devices. nMOS had the disadvantage that it was more susceptible to electronic noise generated by slight impurities in the underlying silicon material, and it was not until the mid-1970s that these, sodium in particular, were successfully removed to the required levels. At that time, around 1975, nMOS quickly took over the market.{{cite web |title= NMOS versus PMOS |url=http://www.hp9825.com/html/prologues.html#NMOS}}
This corresponded with the introduction of new semiconductor masking systems, notably the Micralign system from Perkin-Elmer. Micralign projected an image of the mask onto the silicon wafer, never touching it directly, which eliminated the previous problems when the mask would be lifted off the surface and take away some of the photoresist along with it, ruining the chips on that portion of the wafer.{{cite web |url=https://www.chiphistory.org/154-perkin-elmer-micralign-projection-mask-alignment-system |title= Perkin Elmer - Micralign Projection Mask Alignment System}} By reducing the number of flawed chips, from about 70% to 10%, the cost of complex designs like early microprocessors fell by the same amount. Systems based on contact aligners cost on the order of $300 in single-unit quantities, the MOS 6502, designed specifically to take advantage of these improvements, cost only $25.{{cite web|title=The MOS 6502 and the Best Layout Guy in the World |publisher=swtch.com |date=2011-01-03 |access-date=2014-08-09 |url=http://research.swtch.com/6502}}
This period also saw considerable experimentation with various word lengths. Early on, 4-bit processors were common, like the Intel 4004, simply because making a wider word length could not be accomplished cost-effectively in the room available on the small wafers of the era, especially when the majority would be defective. As yields improved, wafer sizes grew, and feature size continued to be reduced, more complex 8-bit designs emerged like the Intel 8080 and 6502. 16-bit processors emerged early but were expensive; by the decade's end, low-cost 16-bit designs like the Zilog Z8000 were becoming common. Some unusual word lengths were also produced, including 12-bit and 20-bit, often matching a design that had previously been implemented in a multi-chip format in a minicomputer. These had largely disappeared by the end of the decade as minicomputers moved to 32-bit formats.
{{notelist|group=1970s}}
1980s
As Moore's Law continued to drive the industry towards more complex chip designs, the expected widespread move from 8-bit designs of the 1970s to 16-bit designs almost didn't occur; instead, new 32-bit designs like the Motorola 68000 and National Semiconductor NS32000 emerged that offered far more performance. The only widespread use of 16-bit systems was in the IBM PC, which had selected the Intel 8088 in 1979 before the new designs had matured.
Another change was the move to CMOS gates as the primary method of building complex CPUs. CMOS had been available since the early 1970s; RCA introduced the COSMAC processor using CMOS in 1975.{{cite magazine |title=Chip Hall of Fame: RCA CDP 1802 |first=Stephen |last=Cass |date=2 July 2018 |magazine=IEEE Spectrum |url=https://spectrum.ieee.org/chip-hall-of-fame-rca-cdp-1802}} Whereas earlier systems used a single transistor as the basis for each "gate", CMOS used a two-sided design, essentially making it twice as expensive to build. Its advantage was that its logic was not based on the voltage of a transistor compared to the silicon substrate, but the difference in voltages between the two sides, which was detectable at much lower power levels.{{Citation needed|reason=This doesn't make sense. CMOS isn't differential signaling.|date=September 2023}} As processor complexity continued to grow, power dissipation had become a significant concern and chips were prone to overheating; CMOS greatly reduced this problem and quickly took over the market.{{cite book |last1=Kuhn |first1=Kelin|author1-link=Kelin Kuhn |title=High Mobility Materials for CMOS Applications |date=2018 |publisher=Woodhead Publishing |isbn=9780081020623 |chapter=CMOS and Beyond CMOS: Scaling Challenges |page=1 |chapter-url=https://books.google.com/books?id=sOJgDwAAQBAJ&pg=PA1}} This was aided by the uptake of CMOS by Japanese firms while US firms remained on nMOS, giving the Japanese industry a major advance during the 1980s.{{cite book |last1=Gilder |first1=George |title=Microcosm: The Quantum Revolution In Economics And Technology |date=1990 |publisher=Simon and Schuster |isbn=9780671705923 |pages=[https://archive.org/details/microcosm00geor/page/144 144]–5 |url=https://archive.org/details/microcosm00geor|url-access=registration }}
Semiconductor fabrication techniques continued to improve throughout. The Micralign, which had "created the modern IC industry", was obsolete by the early 1980s. They were replaced by the new steppers, which used high magnifications and extremely powerful light sources to allow a large mask to be copied onto the wafer at ever-smaller sizes. This technology allowed the industry to break below the former 1 micron limit.
Key home computers in the early part of the decade predominantly use processors developed in the 1970s. Versions of the 6502, first released in 1975, powered the Commodore 64, Apple II, BBC Micro, and Atari 8-bit computers. The 8-bit Zilog Z80 (1976) is at the core of the ZX Spectrum, MSX systems and many others. The 8086-based IBM PC, launched in 1981, started the move to 16-bit, but was soon passed by the 68000-based 16/32-bit Macintosh, then the Atari ST and Amiga. IBM PC compatibles moved to 32-bit with the introduction of the Intel 80386 in late 1985, although 386-based systems were considerably expensive at the time.
In addition to ever-growing word lengths, microprocessors began to add additional functional units that had previously been optional external parts. By the middle of the decade, memory management units (MMUs) were becoming commonplace, first appearing on designs like the Intel 80286 and Motorola 68030. By the end of the decade, floating point units (FPUs) were being added, first appearing on 1989s Intel 486 and followed the next year by the Motorola 68040.
Another change that began during the 1980s involved overall design philosophy with the emergence of the reduced instruction set computer, or RISC. Although the concept was first developed by IBM in the 1970s, the company did not introduce powerful systems based on it, largely for fear of cannibalizing their sales of larger mainframe systems. Market introduction was driven by smaller companies like MIPS Technologies, SPARC and ARM. These companies did not have access to high-end fabrication like Intel and Motorola, but were able to introduce chips that were highly competitive with those companies with a fraction of the complexity. By the end of the decade, every major vendor was introducing a RISC design of their own, like the IBM POWER, Intel i860 and Motorola 88000.
1990s
The 32-bit microprocessor dominated the consumer market in the 1990s. Processor clock speeds increased by more than tenfold between 1990 and 1999, and 64-bit processors began to emerge later in the decade. In the 1990s, microprocessors no longer used the same clock speed for the processor and the RAM. Processors began to have a front-side bus (FSB) clock speed used in communication with RAM and other components. Typically, the processor itself ran at a clock speed that was a multiple of the FSB clock speed. Intel's Pentium III, for example, had an internal clock speed of 450–600 MHz and an FSB speed of 100–133 MHz. Only the processor's internal clock speed is shown here.
| class="wikitable sortable" style="text-align:center"
! Date ! Name ! Developer ! data-sort-type="number" | Clock ! data-sort-type="number" | Word size ! data-sort-type="number" | Process ! data-sort-type="number" | Transistors ! data-sort-type="number" | Threads |
| 1990
| 68040 | Motorola | 40 MHz | 32 | - | 1.2 | |
| 1990
| POWER1 | IBM | 20–30 MHz | 32 | 1,000 nm | 6.9 | |
| 1991
| R4000 | 100 MHz | 64 | 800 nm | 1.35 | |
| 1991
| NVAX | DEC | 62.5–90.91 MHz | 32 | 750 nm | 1.3 | |
| 1991
| RSC | IBM | 33 MHz | 32 | 800 nm | |
| 1992
| SH-1 | Hitachi | 20 MHz{{cite journal |title=Embedded-DSP SuperH Family and Its Applications |journal=Hitachi Review |date=1998 |volume=47 |issue=4 |pages=121–7 |publisher=Hitachi |s2cid=43356065 |url=http://pdfs.semanticscholar.org/5ef8/dda794a72f0f9c3c347b0a2db9bd1a081571.pdf |archive-url=https://web.archive.org/web/20190225114235/http://pdfs.semanticscholar.org/5ef8/dda794a72f0f9c3c347b0a2db9bd1a081571.pdf |url-status=dead |archive-date=2019-02-25 |access-date=5 July 2019}} | 32 | 800 nm | |
| 1992
| DEC | 100–200 MHz | 64 | 750 nm | 1.68 | |
| 1992
| Sun | 40–50 MHz | 32 | 800 nm | 0.8 | |
| 1992
| PA-7100 | 100 MHz | 32 | 800 nm | |
| 1992
| 486SLC | Cyrix | 40 MHz | 16 | | | |
| 1993
| HARP-1 | Hitachi | 120 MHz | - | 500 nm | 2.8{{cite web |title=HARP-1: A 120 MHz Superscalar PA-RISC Processor |url=https://www.hotchips.org/wp-content/uploads/hc_archives/hc05/3_Tue/HC05.S8/HC05.8.1-Matsubara-Hitachi-HARP-1.pdf |publisher=Hitachi |access-date=19 June 2019 |archive-date=23 April 2016 |archive-url=https://web.archive.org/web/20160423084425/http://www.hotchips.org/wp-content/uploads/hc_archives/hc05/3_Tue/HC05.S8/HC05.8.1-Matsubara-Hitachi-HARP-1.pdf |url-status=dead }} | |
| 1993
| 50–80 MHz | 32 | 2.8 | |
| 1993
| Pentium | Intel | 60–66 MHz | 32 | 800 nm | 3.1 | |
| 1993
| POWER2 | IBM | 55–71.5 MHz | 32 | 720 nm | 23 | |
| 1994
| Fujitsu | 60–125 MHz | - | 500 nm | 2.3 | |
| 1994
| S/390 G1 | IBM | - | 32 | - | | |
| 1994
| 68060 | Motorola | 50 MHz | 32 | 600 nm | 2.5 | |
| 1994
| DEC | 200–300 MHz | 64 | 500 nm | 2.85 | |
| 1994
| R4600 | QED | 100–125 MHz | 64 | 650 nm | 2.2 | |
| 1994
| R8000 | MTI | 75-90 MHz | 64 | 700 nm | 3.43 | |
| 1994
| PA-7200 | 125 MHz | 32 | 550 nm | 1.26 | |
| 1994
| 60–120 MHz | 32 | 500 nm | 1.6 | |
| 1994
| 100–180 MHz | 32 | 500 nm | 3.6 | |
| 1994
| 100 MHz | 32 | 750 nm | 0.90 | |
| 1995
| DEC | 266–333 MHz | 64 | 500 nm | 9.3 | |
| 1995
| S/390 G2 | IBM | - |32 | - | | |
| 1995
| Sun | 143–167 MHz | 64 | 470 nm | 5.2 | |
| 1995
| SPARC64 | 101–118 MHz | 64 | 400 nm | - | |
| 1995
| Intel | 150–200 MHz | 32 | 5.5 | |
| 1996
| DEC | 400–500 MHz | 64 | 350 nm | 9.7 | |
| 1995
| S/390 G3 | IBM | - | 32 | - | | |
| 1996
| K5 | AMD | 75–100 MHz | 32 | 500 nm | 4.3 | |
| 1996
| R10000 | MTI | 150–250 MHz | 64 | 350 nm | 6.7 | |
| 1996
| R5000 | QED | 180–250 MHz | - | 350 nm | 3.7 | |
| 1996
| 141–161 MHz | 64 | 350 nm | - | |
| 1996
| PA-8000 | 160–180 MHz | 64 | 500 nm | 3.8 | |
| 1996
| IBM | 150 MHz | 32 | 290 nm | 15 | |
| 1997
| SH-4 | Hitachi | 200 MHz | - | 200 nm{{cite journal |title=Entertainment Systems and High-Performance Processor SH-4 |journal=Hitachi Review |date=1999 |volume=48 |issue=2 |pages=58–63 |publisher=Hitachi |s2cid=44852046 |url=http://pdfs.semanticscholar.org/2dae/557444cd159c68d9a557189c70a68de0d233.pdf |archive-url=https://web.archive.org/web/20190221030542/http://pdfs.semanticscholar.org/2dae/557444cd159c68d9a557189c70a68de0d233.pdf |url-status=dead |archive-date=2019-02-21 |access-date=27 June 2019}} | 10{{cite web |title=Remembering the Sega Dreamcast |url=https://bit-tech.net/reviews/gaming/retro/remembering-the-sega-dreamcast/3/ |website=Bit-Tech |access-date=18 June 2019 |date=September 29, 2009}} | |
| 1997
| RS64 | IBM | 125 MHz | 64 | ? nm | ? | |
| 1997
| Intel | 233–300 MHz | 32 | 350 nm | 7.5 | |
| 1997
| 120–150 MHz | 64 | 350 nm | 6.9 | |
| 1997
| Sun | 250–400 MHz | 64 | 350 nm | 5.4 | |
| 1997
| S/390 G4 | IBM | 370 MHz | 32 | 500 nm | 7.8 | |
| 1997
| 233–366 MHz | 32 | 260 nm | 6.35 | |
| 1997
| K6 | AMD | 166–233 MHz | 32 | 350 nm | 8.8 | |
| 1998
| RS64-II | IBM | 262 MHz | 64 | 350 nm | 12.5 | |
| 1998
| DEC | 450–600 MHz | 64 | 350 nm | 15.2 | |
| 1998
| SGI | 270–400 MHz | 64 | 6.9 | |
| 1998
| RM7000 | QED | 250–300 MHz | - | 18 | |
| 1998
| 250–330 MHz | 64 | 240 nm | 17.6 | |
| 1998
| S/390 G5 | IBM | 500 MHz | 32 | 250 nm | 25 | |
| 1998
| PA-8500 | 300–440 MHz | 64 | 250 nm | 140 | |
| 1998
| POWER3 | IBM | 200 MHz | 64 | 250 nm | 15 | |
| 1999
| S/390 G6 | IBM | 550-637 MHz | 32 | - | | |
| 1999
| 294–300 MHz | - | 180–65 nm{{cite news |title=EMOTION ENGINE® AND GRAPHICS SYNTHESIZER USED IN THE CORE OF PLAYSTATION® BECOME ONE CHIP |url=https://www.sie.com/content/dam/corporate/en/corporate/release/pdf/030421be.pdf |access-date=26 June 2019 |publisher=Sony |date=April 21, 2003}} | |
| 1999
| Intel | 450–600 MHz | 32 | 250 nm | 9.5 | |
| 1999
| RS64-III | IBM | 450 MHz | 64 | 220 nm | 34 | 2 |
| 1999
| Motorola | 350–500 MHz | 32 | 200–130 nm | 10.5 | |
| 1999
| Athlon | AMD | 500–1000 MHz | 32 | 250 nm | 22 | |
2000s
64-bit processors became mainstream in the 2000s. Microprocessor clock speeds reached a ceiling because of the heat dissipation barrier{{Citation needed|date=January 2024}}. Instead of implementing expensive and impractical cooling systems, manufacturers turned to parallel computing in the form of the multi-core processor. Overclocking had its roots in the 1990s, but came into its own in the 2000s. Off-the-shelf cooling systems designed for overclocked processors became common, and the gaming PC had its advent as well. Over the decade, transistor counts increased by about an order of magnitude, a trend continued from previous decades. Process sizes decreased about fourfold, from 180 nm to 45 nm.
| class="wikitable sortable" style="text-align:center"
! Date ! Name ! Developer ! Clock ! Process ! Transistors |
| 2000
| AMD | 1.33–1.73 GHz | 180 nm | 37.5 | 1 / 1 |
| 2000
| Duron | AMD | 550 MHz–1.3 GHz | 180 nm | 25 | 1 / 1 |
| 2000
| RS64-IV | IBM | 600–750 MHz | 180 nm | 44 | 1 / 2 |
| 2000
| Intel | 1.3–2 GHz | 180–130 nm | 42 | 1 / 1 |
| 2000
| SPARC64 IV | Fujitsu | 450–810 MHz | 130 nm | - | 1 / 1 |
| 2000
| z900 | IBM | 918 MHz | 180 nm | 47 | 1 / 12, 20 |
| 2001
| SGI | 500–600 MHz | 130 nm | 7.2 | 1 / 1 |
| 2001
| POWER4 | IBM | 1.1–1.4 GHz | 180–130 nm | 174 | 2 / 1, 4 |
| 2001
| Sun | 750–1200 MHz | 130 nm | 29 | 1 / 1 |
| 2001
| Itanium | Intel | 733–800 MHz | 180 nm | 25 | 1 / 1 |
| 2001
| Motorola | 733–800 MHz | 180–130 nm | 33 | 1 / 1 |
| 2002
| Fujitsu | 1.1–1.35 GHz | 130 nm | 190 | 1 / 1 |
| 2002
| Intel | 0.9–1 GHz | 180 nm | 410 | 1 / 1 |
| 2003
| IBM | 1.6–2.0 GHz | 130–90 nm | 52 | 1 / 1 |
| 2003
| Intel | 0.9–1.7 GHz | 130–90 nm | 77 | 1 / 1 |
| 2003
| Opteron | AMD | 1.4–2.4 GHz | 130 nm | 106 | 1 / 1 |
| 2004
| POWER5 | IBM | 1.65–1.9 GHz | 130–90 nm | 276 | 2 / 1, 2, 4 |
| 2004
| IBM | 700 MHz | 130 nm | 95 | 2 / 1 |
| 2005
| IBM z9 | IBM | | | | |
| 2005
| AMD | 1.6–3.0 GHz | 90 nm | 114 | 1 / 1 |
| 2005
| Intel | 2.8–3.2 GHz | 90 nm | 115 | 1 / 2 |
| 2005
| AMD | 2–2.4 GHz | 90 nm | 243 | 2 / 1 |
| 2005
| IBM | 1.2–2.5 GHz | 90 nm | 183 | 2 / 1 |
| 2005
| Sun | 1.05–1.35 GHz | 130 nm | 66 | 2 / 1 |
| 2005
| Sun | 1–1.4 GHz | 90 nm | 300 | 8 / 1 |
| 2005
| Xenon | IBM | 3.2 GHz | 90–45 nm | 165 | 3 / 1 |
| 2006
| Core Duo | Intel | 1.1–2.33 GHz | 90–65 nm | 151 | 2 / 1 |
| 2006
| Core 2 | Intel | 1.06–2.67 GHz | 65–45 nm | 291 | 2 / 1, 2 |
| 2006
| 3.2–4.6 GHz | 90–45 nm | 241 | 1+8 / 1 |
| 2006
| Intel | 1.4–1.6 GHz | 90 nm | 1720 | 2 / 1 |
| 2007
| POWER6 | IBM | 3.5–4.7 GHz | 65 nm | 790 | 2 / 1 |
| 2007
| Fujitsu | 2.15–2.4 GHz | 90 nm | 543 | 2 / 1 |
| 2007
| Sun | 1–1.4 GHz | 65 nm | 503 | 8 / 1 |
| 2007
| TILE64 | Tilera | 600–900 MHz | 90–45 nm | ? | 64 / 1 |
| 2007
| AMD | 1.8–3.2 GHz | 65 nm | 463 | 4 / 1 |
| 2007
| IBM | 850 MHz | 90 nm | 208 | 4 / 1 |
| 2008
| Phenom | AMD | 1.8–2.6 GHz | 65 nm | 450 | 2, 3, 4 / 1 |
| 2008
| z10 | IBM | 4.4 GHz | 65 nm | 993 | 4 / 7 |
| 2008
| IBM | 2.8–4.0 GHz | 65 nm | 250 | 1+8 / 1 |
| 2008
| Fujitsu | 2.4–2.88 GHz | 65 nm | 600 | 4 / 1 |
| 2008
| Atom | Intel | 0.8–1.6 GHz | 65–45 nm | 47 | 1 / 1 |
| 2008
| Core i7 | Intel | 2.66–3.2 GHz | 45–32 nm | 730 | 2, 4, 6 / 1 |
| 2008
| Tilera | 600–866 MHz | 90–45 nm | ? | 64 / 1 |
| 2008
| AMD | 2.3–2.9 GHz | 45 nm | 751 | 4 / 1 |
| 2009
| AMD | 2.5–3.2 GHz | 45 nm | 758 | 2, 3, 4, 6 / 1 |
| 2009
| AMD | 2.2–2.8 GHz | 45 nm | 904 | 6 / 1 |
2010s
A new trend appears, the multi-chip module made of several chiplets. This is multiple monolithic chips in a single package. This allows higher integration with several smaller and easier to manufacture chips.
| class="wikitable sortable" style="text-align:center"
! Date ! Name ! Developer ! Clock ! Process ! Transistors ! Cores per die / ! Threads |
| 2010
| POWER7 | IBM | 3–4.14 GHz | 45 nm | 1200 | 4, 6, 8 / 1, 4 | 4 |
| 2010
| Intel | 2 GHz | 65 nm | 2000 | 2, 4 / 1 | 2 |
| 2010
| AMD | 1.7–2.4 GHz | 45 nm | 1810 | 4, 6 / 2 | 1 |
| 2010
| Intel | 1.73–2.66 GHz | 45 nm | 2300 | 4, 6, 8 / 1 | 2 |
| 2010
| z196 | IBM | 3.8–5.2 GHz | 45 nm | 1400 | 4 / 1, 6 | 1 |
| 2010
| SPARC T3 | Sun | 1.6 GHz | 45 nm | 2000 | 16 / 1 | 8 |
| 2010
| Fujitsu | 2.66–3.0 GHz | 45 nm | ? | 4 / 1 | 2 |
| 2010
| Intel | 1.86–3.33 GHz | 32 nm | 1170 | 4–6 / 1 | 2 |
| 2011
| Intel | 1.6–3.4 GHz | 32 nm | 2, 4 / 1 | (1,) 2 |
| 2011
| AMD | 1.0–1.6 GHz | 40 nm | 1, 2 / 1 | 1 |
| 2011
| Xeon E7 | Intel | 1.73–2.67 GHz | 32 nm | 2600 | 4, 6, 8, 10 / 1 | 1–2 |
| 2011
| IBM | 1.6 GHz | 45 nm | 1470 | 18 / 1 | 4 |
| 2011
| Fujitsu | 2.0 GHz | 45 nm | 760 | 8 / 1 | 2 |
| 2011
| AMD | 3.1–3.6 GHz | 32 nm | 4–8 / 2 | 1 |
| 2011
| SPARC T4 | Oracle | 2.8–3 GHz | 40 nm | 855 | 8 / 1 | 8 |
| 2012
| Fujitsu | 1.848 GHz | 40 nm | 1870 | 16 / 1 | 2 |
| 2012
| zEC12 | IBM | 5.5 GHz | 32 nm | 2750 | 6 / 6 | 1 |
| 2012
| POWER7+ | IBM | 3.1–5.3 GHz | 32 nm | 2100 | 8 / 1, 2 | 4 |
| 2012
| Intel | 1.73–2.53 GHz | 32 nm | 3100 | 8 / 1 | 2 |
| 2013
| Intel | 1.9–4.4 GHz | 22 nm | 1400 | 4 / 1 | 2 |
| 2013
| Fujitsu | 2.8–3 GHz | 28 nm | 2950 | 16 / 1 | 2 |
| 2013
| SPARC T5 | Oracle | 3.6 GHz | 28 nm | 1500 | 16 / 1 | 8 |
| 2014
| POWER8 | IBM | 2.5–5 GHz | 22 nm | 4200 | 6, 12 / 1, 2 | 8 |
| 2014
| Intel | 1.8-4 GHz | 14 nm | 1900 | 2, 4, 6, 8, 12, 16 / 1, 2, 4 | 2 |
| 2015
| z13 | IBM | 5 GHz | 22 nm | 3990 | 8 / 1 | 2 |
| 2015
| A8-7670K | AMD | 3.6 GHz | 28 nm | 2410 | 4 / 1 | 1 |
| 2016
| RISC-V E31{{cite web |url=https://www.sifive.com/products/hifive1/ |title=SiFive - HiFive1 |archive-url=https://web.archive.org/web/20161130123115/https://www.sifive.com/products/hifive1/ |archive-date=2016-11-30 |url-status=dead}} | SiFive | 320 MHz | 28 nm | ? | 1 | 1 |
| 2017
| Zen | AMD | 3.2–4.1 GHz | 14 nm | 4800 | 8, 16 / 1, 2, 4 | 2 |
| 2017
| z14 | IBM | 5.2 GHz | 14 nm | 6100 | 10 / 1 | 2 |
| 2017
| POWER9 | IBM | 4 GHz | 14 nm | 8000 | 12, 24 / 1 | 4, 8 |
| 2017
| Oracle | 5 GHz | 20 nm | 32 | 8 |
| 2017
| RISC-V U54-MC{{cite web |url=https://www.sifive.com/products/risc-v-core-ip/u54-mc/ |title=SiFive - HiFive1 |archive-url=https://web.archive.org/web/20171018135414/https://www.sifive.com/products/risc-v-core-ip/u54-mc/ |archive-date=2017-10-18 |url-status=dead}} | SiFive | 1.5 GHz | 28 nm | 250 | 4 | 1 |
| 2018
| Intel | 2.2–3.2 GHz | 10 nm | ? | 2 / 1 | 2 |
| 2018
| Zen+ | AMD | 2.8–3.7 GHz | 12 nm | 4800 | 2, 4, 6, 8 / 1, 2, 4 | 1, 2 |
| 2018
| RISC-V U74-MC{{cite web |url=https://www.cnx-software.com/2018/11/02/sifive-7-series-risc-v-cores-e76-s76-u74 |title=SiFive Introduces 7 Series RISC-V Cores |date=2 November 2018 }} | SiFive | 1.5 GHz | ? | ? | 4 | 1 |
| 2019
| Zen 2 | AMD | 2–4.7 GHz | 7 nm, 12nm | 3900 | 4, 6, 8 / 1, 2, 4, 6, 8 | 2 |
| 2019
| z15 | IBM | 5.2 GHz | 14 nm | 9200 | 12 / 1 | 2 |
2020s
| class="wikitable sortable" style="text-align:center"
! Date ! Name ! Developer ! Clock ! Process ! Transistors ! Cores per die / ! Threads |
| 2020
| Zen 3 | AMD | 3.4–4.9 GHz |7 nm, 12nm | 6240–35290 | 4, 6, 8 / 1, 2, 4, 8 | 2 |
| 2020
| Apple | 3.2 GHz | 5 nm | 16000–144000 | 4–8P, 2–4E / 1, 2 | 1 |
| 2021
|0.7–5.3 GHz |7 nm | ? |0–8P, 2–8E |1–2 |
| 2022
| IBM | >5 GHz | 7 nm | 22000 | 8 | 1 |
| 2022
| Apple | 3.49/2.42 GHz | 5 nm (N5P) | 20000–134000 | 4–8P, 4E / 1, 2 | 1 |
| 2022
| Zen 4 | AMD | 2.0–5.7 GHz | 5 nm, 7 nm | 6570 | 4, 6, 8 / 1, 2, 4, 8, 12 | 2 |
| 2023
| Zen 4C | AMD | 2.0–3.1 GHz | 5 nm | 8200 | 4, 6, 8, 12, 14, 16 / 1, 2, 4, 8 | 1, 2 |
| 2023
| Apple | 4.05/2.75 GHz | 3 nm | 25000–92000 | 4–12P, 4–6E | 1 |
| 2023
| Intel | 0.7–5.0 GHz | 5 nm, 7 nm | ? | 2–6P, 4–8E, 2LP-E | 1–2 |
| 2024
| Oryon | Qualcomm | 4.3 GHz | 4 nm | ? | 12 | 1 |
| 2024
| Zen 5 | AMD | 4.3 GHz | 5 nm | 8315-20030 | 6, 8, 16 / 2, 3 | 2 |
See also
{{Portal|Electronics}}
- Moore's law
- Transistor count per chip, chronology
- Timeline of instructions per second{{snd}} architectural chip performance chronology
- Tick–tock model, and its successor:
- Process–architecture–optimization model
References and notes
;References
{{reflist|30em}}
;Notes
- [http://www.sandpile.org/ sandpile.org] for x86 processor information
- {{cite journal |last=Ogdin |first=Jerry |title=Microprocessor scorecard |journal=Euromicro Newsletter |volume=1 |issue=2 |pages=43–77 |date=January 1975 |doi=10.1016/0303-1268(75)90008-5 }}
{{CPU technologies}}